Fixed bug 3411774.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3367 35acf78f-673a-0410-8e92-d51de3d6d3f4master
parent
2eae001460
commit
01596d8b5e
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@ -82,6 +82,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -123,8 +125,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 FALSE
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#define STM32_HAS_UART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 FALSE
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@ -150,6 +153,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -191,8 +196,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 FALSE
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@ -218,6 +224,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -259,8 +267,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 FALSE
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#define STM32_HAS_UART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 FALSE
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@ -286,6 +295,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -327,8 +338,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART5 FALSE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB TRUE
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#define STM32_HAS_OTG1 FALSE
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@ -354,6 +366,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -395,8 +409,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 TRUE
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#define STM32_HAS_UART4 TRUE
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#define STM32_HAS_UART5 TRUE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB TRUE
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#define STM32_HAS_OTG1 FALSE
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@ -422,6 +437,8 @@
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 19
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -463,8 +480,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 TRUE
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#define STM32_HAS_UART4 TRUE
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#define STM32_HAS_UART5 TRUE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB TRUE
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#define STM32_HAS_OTG1 FALSE
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@ -490,6 +508,8 @@
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#define STM32_HAS_ETH TRUE
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#define STM32_EXTI_NUM_CHANNELS 20
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -531,8 +551,9 @@
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 TRUE
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#define STM32_HAS_UART4 TRUE
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#define STM32_HAS_UART5 TRUE
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#define STM32_HAS_USART6 FALSE
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 TRUE
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@ -87,10 +87,11 @@
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#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
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#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
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RTC clock. */
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/*===========================================================================*/
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/* Platform specific friendly IRQ names. */
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@ -143,8 +144,8 @@
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#define USART3_IRQHandler VectorDC /**< USART3. */
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#endif
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#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
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#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
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#define CEC_IRQHandler VectorE8 /**< CEC. */
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#define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
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#define CEC_IRQHandler VectorE8 /**< CEC. */
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#define TIM12_IRQHandler VectorEC /**< TIM12. */
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#define TIM13_IRQHandler VectorF0 /**< TIM13. */
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#define TIM14_IRQHandler VectorF4 /**< TIM14. */
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@ -90,10 +90,11 @@
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#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
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#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
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RTC clock. */
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/*===========================================================================*/
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/* Platform specific friendly IRQ names. */
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@ -144,8 +145,8 @@
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#define USART2_IRQHandler VectorD8 /**< USART2. */
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#define USART3_IRQHandler VectorDC /**< USART3. */
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#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
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#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
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#define USBWakeUp_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
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#define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
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#define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
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#define TIM8_BRK_IRQHandler VectorEC /**< TIM8 Break. */
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#define TIM8_UP_IRQHandler VectorF0 /**< TIM8 Update. */
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#define TIM8_TRG_COM_IRQHandler VectorF4 /**< TIM8 Trigger and
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@ -92,10 +92,11 @@
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#define STM32_MCO_XT1 (10 << 24) /**< XT1 clock on MCO pin. */
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#define STM32_MCO_PLL3 (11 << 24) /**< PLL3 clock on MCO pin. */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as RTC clock */
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#define STM32_RTC_NOCLOCK (0 << 8) /**< No clock. */
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#define STM32_RTC_LSE (1 << 8) /**< LSE used as RTC clock. */
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#define STM32_RTC_LSI (2 << 8) /**< LSI used as RTC clock. */
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#define STM32_RTC_HSE (3 << 8) /**< HSE divided by 128 used as
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RTC clock. */
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/* RCC_CFGR2 register bits definitions.*/
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#define STM32_PREDIV1SRC_HSE (0 << 16) /**< PREDIV1 source is HSE. */
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@ -148,7 +149,7 @@
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#define USART2_IRQHandler VectorD8 /**< USART2. */
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#define USART3_IRQHandler VectorDC /**< USART3. */
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#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
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#define RTCAlarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
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#define RTC_Alarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
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line. */
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#define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through
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EXTI line. */
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@ -217,8 +217,10 @@ typedef enum IRQn
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USART1_IRQn = 37, /*!< USART1 global Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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USB_FS_WKUP_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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#endif /* STM32F10X_LD */
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#ifdef STM32F10X_LD_VL
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@ -236,7 +238,8 @@ typedef enum IRQn
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USART1_IRQn = 37, /*!< USART1 global Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
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TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */
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TIM7_IRQn = 55 /*!< TIM7 Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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USB_FS_WKUP_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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#endif /* STM32F10X_MD */
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#ifdef STM32F10X_MD_VL
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@ -290,7 +295,8 @@ typedef enum IRQn
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
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TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */
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TIM7_IRQn = 55 /*!< TIM7 Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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USB_FS_WKUP_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */
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TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */
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TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */
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TIM12_IRQn = 43, /*!< TIM12 global Interrupt */
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TIM13_IRQn = 44, /*!< TIM13 global Interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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USB_FS_WKUP_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
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TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */
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TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */
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TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */
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USART2_IRQn = 38, /*!< USART2 global Interrupt */
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USART3_IRQn = 39, /*!< USART3 global Interrupt */
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EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
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RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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/* CHIBIOS FIX (making it compatible with STM32L and STM32F2 headers).*/
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */
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TIM5_IRQn = 50, /*!< TIM5 global Interrupt */
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SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
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/* STM32F2xx capabilities.*/
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#define STM32_HAS_ADC1 TRUE
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#define STM32_HAS_ADC2 TRUE
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#define STM32_HAS_ADC3 FALSE
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#define STM32_HAS_ADC3 TRUE
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#define STM32_HAS_CAN1 TRUE
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#define STM32_HAS_CAN2 TRUE
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#define STM32_HAS_ETH TRUE
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#define STM32_EXTI_NUM_CHANNELS 23
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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#define STM32_HAS_TIM3 TRUE
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#define STM32_HAS_TIM4 TRUE
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#define STM32_HAS_TIM5 TRUE
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#define STM32_HAS_TIM6 TRUE
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#define STM32_HAS_TIM7 TRUE
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#define STM32_HAS_TIM6 FALSE
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#define STM32_HAS_TIM7 FALSE
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#define STM32_HAS_TIM8 TRUE
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#define STM32_HAS_TIM9 TRUE
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#define STM32_HAS_TIM10 TRUE
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#define STM32_HAS_USART1 TRUE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART3 FALSE
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#define STM32_HAS_UART4 FALSE
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#define STM32_HAS_UART4 TRUE
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#define STM32_HAS_UART5 TRUE
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#define STM32_HAS_USART6 TRUE
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#define STM32_HAS_USB TRUE
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#define STM32_HAS_USB FALSE
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#define STM32_HAS_OTG1 TRUE
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/*===========================================================================*/
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#define USART2_IRQHandler VectorD8 /**< USART2. */
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#define USART3_IRQHandler VectorDC /**< USART3. */
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#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
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#define RTCAlarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
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#define RTC_Alarm_IRQHandler VectorE4 /**< RTC alarm through EXTI
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line. */
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#define OTG_FS_WKUP_IRQHandler VectorE8 /**< USB OTG FS Wakeup through
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EXTI line. */
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#define STM32_HAS_ETH FALSE
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#define STM32_EXTI_NUM_CHANNELS 23
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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@ -189,8 +191,9 @@
|
|||
#define STM32_HAS_USART1 TRUE
|
||||
#define STM32_HAS_USART2 TRUE
|
||||
#define STM32_HAS_USART3 TRUE
|
||||
#define STM32_HAS_UART3 FALSE
|
||||
#define STM32_HAS_UART4 FALSE
|
||||
#define STM32_HAS_UART5 FALSE
|
||||
#define STM32_HAS_USART6 FALSE
|
||||
|
||||
#define STM32_HAS_USB TRUE
|
||||
#define STM32_HAS_OTG1 FALSE
|
||||
|
@ -201,8 +204,10 @@
|
|||
#define WWDG_IRQHandler Vector40 /**< Window Watchdog. */
|
||||
#define PVD_IRQHandler Vector44 /**< PVD through EXTI Line
|
||||
detect. */
|
||||
#define TAMPER_IRQHandler Vector48 /**< Tamper. */
|
||||
#define RTC_IRQHandler Vector4C /**< RTC. */
|
||||
#define TAMPER_STAMP_IRQHandler Vector48 /**< Tamper and Time Stamp
|
||||
through EXTI. */
|
||||
#define RTC_WKUP_IRQHandler Vector4C /**< RTC Wakeup Timer through
|
||||
EXTI. */
|
||||
#define FLASH_IRQHandler Vector50 /**< Flash. */
|
||||
#define RCC_IRQHandler Vector54 /**< RCC. */
|
||||
#define EXTI0_IRQHandler Vector58 /**< EXTI Line 0. */
|
||||
|
@ -221,7 +226,7 @@
|
|||
#define USB_HP_IRQHandler Vector8C /**< USB High Priority. */
|
||||
#define USB_LP_IRQHandler Vector90 /**< USB Low Priority. */
|
||||
#define DAC_IRQHandler Vector94 /**< DAC. */
|
||||
#define COMP_IRQHandler Vector98 /**< COMP. */
|
||||
#define COMP_IRQHandler Vector98 /**< Comparator through EXTI. */
|
||||
#define EXTI9_5_IRQHandler Vector9C /**< EXTI Line 9..5. */
|
||||
#define TIM9_IRQHandler VectorA0 /**< TIM9. */
|
||||
#define TIM10_IRQHandler VectorA4 /**< TIM10. */
|
||||
|
@ -240,8 +245,8 @@
|
|||
#define USART2_IRQHandler VectorD8 /**< USART2. */
|
||||
#define USART3_IRQHandler VectorDC /**< USART3. */
|
||||
#define EXTI15_10_IRQHandler VectorE0 /**< EXTI Line 15..10. */
|
||||
#define RTCAlarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
|
||||
#define USBWakeUp_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
|
||||
#define RTC_Alarm_IRQHandler VectorE4 /**< RTC Alarm through EXTI. */
|
||||
#define USB_FS_WKUP_IRQHandler VectorE8 /**< USB Wakeup from suspend. */
|
||||
#define TIM6_IRQHandler VectorEC /**< TIM6. */
|
||||
#define TIM7_IRQHandler VectorF0 /**< TIM7. */
|
||||
/** @} */
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
# List of all the STM32L1xx platform files.
|
||||
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32L1xx/hal_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \
|
||||
${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \
|
||||
|
|
|
@ -73,6 +73,8 @@
|
|||
*****************************************************************************
|
||||
|
||||
*** 2.3.3 ***
|
||||
- FIX: Fixed missing UART5 definition in STM32 HAL (bug 3411774)(backported
|
||||
to 2.2.8).
|
||||
- FIX: The function chThdExit() triggers an error on shell return when the
|
||||
system state checker is enabled (bug 3411207)(backported to 2.2.8).
|
||||
- FIX: Some ARMCMx makefiles refer the file rules.mk in the ARM7 port (bug
|
||||
|
|
Loading…
Reference in New Issue