Documentation related fixes.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3403 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/hal/platforms/STM32/DMAv1/stm32_dma.c

@@ -411,6 +411,7 @@ void dmaInit(void) {
  * @note    This function can be invoked in both ISR or thread context.
  *
  * @param[in] dmastp    pointer to a stm32_dma_stream_t structure
+ * @param[in] priority  IRQ priority mask for the DMA stream
  * @param[in] func      handling function pointer, can be @p NULL
  * @param[in] param     a parameter to be passed to the handling function
  * @return              The operation status.

os/hal/platforms/STM32/DMAv1/stm32_dma.h

@@ -217,7 +217,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
  * @brief   DMA stream enable.
  * @note    This function can be invoked in both ISR or thread context.
  *
- * @param[in] dmachp    pointer to a stm32_dma_stream_t structure
+ * @param[in] dmastp    pointer to a stm32_dma_stream_t structure
  *
  * @special
  */

os/hal/platforms/STM32/DMAv2/stm32_dma.c

@@ -450,6 +450,7 @@ void dmaInit(void) {
  * @note    This function can be invoked in both ISR or thread context.
  *
  * @param[in] dmastp    pointer to a stm32_dma_stream_t structure
+ * @param[in] priority  IRQ priority mask for the DMA stream
  * @param[in] func      handling function pointer, can be @p NULL
  * @param[in] param     a parameter to be passed to the handling function
  * @return              The operation status.

os/hal/platforms/STM32/USBv1/usb_lld.c

@@ -19,7 +19,7 @@
 */
 
 /**
- * @file    STM32/usb_lld.c
+ * @file    STM32/USBv1/usb_lld.c
  * @brief   STM32 USB subsystem low level driver source.
  *
  * @addtogroup USB

os/hal/platforms/STM32/USBv1/usb_lld.h

@@ -19,7 +19,7 @@
 */
 
 /**
- * @file    STM32/usb_lld.h
+ * @file    STM32/USBv1/usb_lld.h
  * @brief   STM32 USB subsystem low level driver header.
  *
  * @addtogroup USB

os/hal/platforms/STM32F1xx/hal_lld_f100.h

@@ -26,7 +26,7 @@
  */
 
 /**
- * @file    STM32/hal_lld_f100.h
+ * @file    STM32F1xx/hal_lld_f100.h
  * @brief   STM32F100 Value Line HAL subsystem low level driver header.
  *
  * @addtogroup STM32F100_HAL

os/hal/platforms/STM32F1xx/hal_lld_f103.h

@@ -26,7 +26,7 @@
  */
 
 /**
- * @file    STM32/hal_lld_f103.h
+ * @file    STM32F1xx/hal_lld_f103.h
  * @brief   STM32F103 Performance Line HAL subsystem low level driver header.
  *
  * @addtogroup STM32F103_HAL

os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h

@@ -26,7 +26,7 @@
  */
 
 /**
- * @file    STM32/hal_lld_f105_f107.h
+ * @file    STM32F1xx/hal_lld_f105_f107.h
  * @brief   STM32F10x Connectivity Line HAL subsystem low level driver header.
  *
  * @addtogroup STM32F10X_CL_HAL

os/hal/platforms/STM32F1xx/platform.dox

@@ -19,7 +19,7 @@
 */
 
 /**
- * @defgroup STM32F1xx_DRIVERS STM32F1xx Drivers
+ * @defgroup STM32_DRIVERS STM32F1xx Drivers
  * @details This section describes all the supported drivers on the STM32F1xx
  *          platform and the implementation details of the single drivers.
  *
@@ -27,7 +27,7 @@
  */
 
 /**
- * @defgroup STM32F1xx_HAL STM32F1xx Initialization Support
+ * @defgroup STM32_HAL STM32F1xx Initialization Support
  * @details The STM32F1xx HAL support is responsible for system initialization.
  *
  * @section stm32f1xx_hal_1 Supported HW resources
@@ -44,11 +44,11 @@
  * - SYSTICK initialization based on current clock and kernel required rate.
  * - DMA support initialization.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_ADC STM32F1xx ADC Support
+ * @defgroup STM32_ADC STM32F1xx ADC Support
  * @details The STM32F1xx ADC driver supports the ADC peripherals using DMA
  *          channels for maximum performance.
  *
@@ -64,11 +64,11 @@
  * - Programmable DMA interrupt priority for each DMA channel.
  * - DMA errors detection.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_CAN STM32F1xx CAN Support
+ * @defgroup STM32_CAN STM32F1xx CAN Support
  * @details The STM32F1xx CAN driver uses the CAN peripherals.
  *
  * @section stm32f1xx_can_1 Supported HW resources
@@ -79,11 +79,11 @@
  * - Support for bxCAN sleep mode.
  * - Programmable bxCAN interrupts priority level.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_DMA STM32F1xx DMA Support
+ * @defgroup STM32_DMA STM32F1xx DMA Support
  * @details This DMA helper driver is used by the other drivers in order to
  *          access the shared DMA resources in a consistent way.
  *
@@ -98,11 +98,11 @@
  * - Automatic DMA clock stop when not in use by any driver.
  * - DMA streams and interrupt vectors sharing among multiple drivers.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_EXT STM32F1xx EXT Support
+ * @defgroup STM32_EXT STM32F1xx EXT Support
  * @details The STM32F1xx EXT driver uses the EXTI peripheral.
  *
  * @section stm32f1xx_ext_1 Supported HW resources
@@ -113,11 +113,11 @@
  * - Programmable EXTI interrupts priority level.
  * - Capability to work as event sources (WFE) rather than interrupt sources.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_GPT STM32F1xx GPT Support
+ * @defgroup STM32_GPT STM32F1xx GPT Support
  * @details The STM32F1xx GPT driver uses the TIMx peripherals.
  *
  * @section stm32f1xx_gpt_1 Supported HW resources
@@ -132,11 +132,27 @@
  *   peripherals are left in low power mode.
  * - Programmable TIMx interrupts priority level.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_ICU STM32F1xx ICU Support
+ * @defgroup STM32_I2C STM32F1xx I2C Support
+ * @details The STM32F1xx I2C driver uses the I2Cx peripherals.
+ *
+ * @section stm32f1xx_i2c_1 Supported HW resources
+ * - I2C1.
+ * - I2C2.
+ * .
+ * @section stm32f1xx_i2c_2 STM32F1xx I2C driver implementation features
+ * - Each I2C port can be independently enabled and programmed. Unused
+ *   peripherals are left in low power mode.
+ * - Programmable I2Cx interrupts priority level.
+ * .
+ * @ingroup STM32_DRIVERS
+ */
+
+/**
+ * @defgroup STM32_ICU STM32F1xx ICU Support
  * @details The STM32F1xx ICU driver uses the TIMx peripherals.
  *
  * @section stm32f1xx_icu_1 Supported HW resources
@@ -151,11 +167,21 @@
  *   peripherals are left in low power mode.
  * - Programmable TIMx interrupts priority level.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_PAL STM32F1xx PAL Support
+ * @defgroup STM32_MAC STM32 MAC Support
+ * @details The STM32 MAC driver supports the ETH peripheral.
+ *
+ * @section at91sam7_mac_1 Supported HW resources
+ * - ETH.
+ * .
+ * @ingroup STM32_DRIVERS
+ */
+
+/**
+ * @defgroup STM32_PAL STM32F1xx PAL Support
  * @details The STM32F1xx PAL driver uses the GPIO peripherals.
  *
  * @section stm32f1xx_pal_1 Supported HW resources
@@ -187,8 +213,8 @@
  * - @p PAL_MODE_INPUT_ANALOG.
  * - @p PAL_MODE_OUTPUT_PUSHPULL.
  * - @p PAL_MODE_OUTPUT_OPENDRAIN.
- * - @p PAL_MODE_STM32F1xx_ALTERNATE_PUSHPULL (non standard).
+ * - @p PAL_MODE_STM32_ALTERNATE_PUSHPULL (non standard).
- * - @p PAL_MODE_STM32F1xx_ALTERNATE_OPENDRAIN (non standard).
+ * - @p PAL_MODE_STM32_ALTERNATE_OPENDRAIN (non standard).
  * .
  * Any attempt to setup an invalid mode is ignored.
  *
@@ -201,11 +227,11 @@
  *   resistor can change the resistor setting because the output latch is
  *   used for resistor selection.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_PWM STM32F1xx PWM Support
+ * @defgroup STM32_PWM STM32F1xx PWM Support
  * @details The STM32F1xx PWM driver uses the TIMx peripherals.
  *
  * @section stm32f1xx_pwm_1 Supported HW resources
@@ -221,11 +247,37 @@
  * - Four independent PWM channels per timer.
  * - Programmable TIMx interrupts priority level.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_SDC STM32F1xx SDC Support
+ * @defgroup STM32_RCC STM32F1xx RCC Support
+ * @details This RCC helper driver is used by the other drivers in order to
+ *          access the shared RCC resources in a consistent way.
+ *
+ * @section stm32f1xx_rcc_1 Supported HW resources
+ * - RCC.
+ * .
+ * @section stm32f1xx_rcc_2 STM32F1xx RCC driver implementation features
+ * - Peripherals reset.
+ * - Peripherals clock enable.
+ * - Periplerals clock disable.
+ * .
+ * @ingroup STM32_DRIVERS
+ */
+
+/**
+ * @defgroup STM32_RTC STM32F1xx RTC Support
+ * @details The STM32F1xx RTC driver uses the RTC peripheral.
+ *
+ * @section stm32f1xx_rtc_1 Supported HW resources
+ * - RTC.
+ * .
+ * @ingroup STM32_DRIVERS
+ */
+
+/**
+ * @defgroup STM32_SDC STM32F1xx SDC Support
  * @details The STM32F1xx SDC driver uses the SDIO peripheral.
  *
  * @section stm32f1xx_sdc_1 Supported HW resources
@@ -238,11 +290,11 @@
  * - DMA is used for receiving and transmitting.
  * - Programmable DMA bus priority for each DMA channel.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_SERIAL STM32F1xx Serial Support
+ * @defgroup STM32_SERIAL STM32F1xx Serial Support
  * @details The STM32F1xx Serial driver uses the USART/UART peripherals in a
  *          buffered, interrupt driven, implementation.
  *
@@ -261,11 +313,11 @@
  * - Fully interrupt driven.
  * - Programmable priority levels for each UART/USART.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_SPI STM32F1xx SPI Support
+ * @defgroup STM32_SPI STM32F1xx SPI Support
  * @details The SPI driver supports the STM32F1xx SPI peripherals using DMA
  *          channels for maximum performance.
  *
@@ -286,11 +338,11 @@
  * - Programmable DMA interrupt priority for each DMA channel.
  * - Programmable DMA error hook.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_UART STM32F1xx UART Support
+ * @defgroup STM32_UART STM32F1xx UART Support
  * @details The UART driver supports the STM32F1xx USART peripherals using DMA
  *          channels for maximum performance.
  *
@@ -313,11 +365,11 @@
  * - Programmable DMA interrupt priority for each DMA channel.
  * - Programmable DMA error hook.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */
 
 /**
- * @defgroup STM32F1xx_USB STM32F1xx USB Support
+ * @defgroup STM32_USB STM32F1xx USB Support
  * @details The USB driver supports the STM32F1xx USB peripheral.
  *
  * @section stm32f1xx_usb_1 Supported HW resources
@@ -329,5 +381,5 @@
  * - Programmable interrupt priority levels.
  * - Each endpoint programmable in Control, Bulk and Interrupt modes.
  * .
- * @ingroup STM32F1xx_DRIVERS
+ * @ingroup STM32_DRIVERS
  */