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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1844 35acf78f-673a-0410-8e92-d51de3d6d3f4

master
gdisirio 2010-04-03 15:46:41 +00:00
parent 8f0fb6e02e
commit 000181feea
2 changed files with 3 additions and 3 deletions
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2
os/kernel/include/chschd.h
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@ -116,7 +116,7 @@ register Thread *currp asm(CH_CURRP_REGISTER_CACHE);
#if !defined(CH_CURRP_REGISTER_CACHE) || defined(__DOXYGEN__) #if !defined(CH_CURRP_REGISTER_CACHE) || defined(__DOXYGEN__)
#define setcurrp(tp) (rlist.r_current = (tp)) #define setcurrp(tp) (rlist.r_current = (tp))
#else /* defined(CH_CURRP_REGISTER_CACHE) */ #else /* defined(CH_CURRP_REGISTER_CACHE) */
(currp = (tp)) #define setcurrp(tp) (currp = (tp))
#endif /* defined(CH_CURRP_REGISTER_CACHE) */ #endif /* defined(CH_CURRP_REGISTER_CACHE) */
#endif /* !defined(PORT_OPTIMIZED_SETCURRP) */ #endif /* !defined(PORT_OPTIMIZED_SETCURRP) */

4
os/ports/GCC/ARMCMx/chcore_v7m.c
View File

@ -29,12 +29,12 @@
#if !CH_OPTIMIZE_SPEED #if !CH_OPTIMIZE_SPEED
void _port_lock(void) { void _port_lock(void) {
register uint32_t tmp asm ("r3") = BASEPRI_KERNEL; register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL;
asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); asm volatile ("msr BASEPRI, %0" : : "r" (tmp));
} }
void _port_unlock(void) { void _port_unlock(void) {
register uint32_t tmp asm ("r3") = BASEPRI_USER; register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED;
asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); asm volatile ("msr BASEPRI, %0" : : "r" (tmp));
} }
#endif #endif