2009-08-16 13:07:24 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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2009-08-20 08:31:37 +00:00
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* @file os/ports/GCC/MSP430/pal_lld.h
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2009-08-16 13:07:24 +00:00
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* @brief MSP430 Digital I/O low level driver header
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* @addtogroup MSP430_PAL
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* @{
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*/
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#ifndef _PAL_LLD_H_
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#define _PAL_LLD_H_
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#include <msp430x16x.h>
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @brief Simplified MSP430 I/O port representation.
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* @details This structure represents the common part of all the MSP430 I/O
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* ports.
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*/
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struct port_common_t {
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ioregister_t in;
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ioregister_t out;
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ioregister_t dir;
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};
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/**
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* @brief Generic MSP430 I/O port.
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*/
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union __ioport {
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struct port_common_t iop_common;
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struct port_simple_t iop_simple;
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struct port_full_t iop_full;
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};
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/**
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* @brief Setup registers common to all the MSP430 ports.
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*/
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typedef struct {
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ioregister_t out;
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ioregister_t dir;
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} msp430_dio_setup_t;
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/**
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* @brief MSP430 I/O ports static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialized the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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#if defined(__MSP430_HAS_PORT1__) || \
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defined(__MSP430_HAS_PORT1_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 1 setup data.*/
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msp430_dio_setup_t P1Data;
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#endif
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#if defined(__MSP430_HAS_PORT2__) || \
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defined(__MSP430_HAS_PORT2_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 2 setup data.*/
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msp430_dio_setup_t P2Data;
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#endif
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#if defined(__MSP430_HAS_PORT3__) || \
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defined(__MSP430_HAS_PORT3_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 3 setup data.*/
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msp430_dio_setup_t P3Data;
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#endif
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#if defined(__MSP430_HAS_PORT4__) || \
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defined(__MSP430_HAS_PORT4_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 4 setup data.*/
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msp430_dio_setup_t P4Data;
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#endif
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#if defined(__MSP430_HAS_PORT5__) || \
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defined(__MSP430_HAS_PORT5_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 5 setup data.*/
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msp430_dio_setup_t P5Data;
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#endif
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#if defined(__MSP430_HAS_PORT6__) || \
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defined(__MSP430_HAS_PORT6_R__) || \
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defined(__DOXYGEN__)
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/** @brief Port 6 setup data.*/
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msp430_dio_setup_t P6Data;
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#endif
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} MSP430DIOConfig;
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/**
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* @brief Width, in bits, of an I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 8
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/**
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* @brief Whole port mask.
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* @brief This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
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/**
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* @brief Digital I/O port sized unsigned type.
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*/
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typedef uint8_t ioportmask_t;
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/**
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* @brief Port Identifier.
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* @details This type can be a scalar or some kind of pointer, do not make
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* any assumption about it, use the provided macros when populating
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* variables of this type.
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*/
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typedef union __ioport * ioportid_t;
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/*===========================================================================*/
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/* I/O Ports Identifiers. */
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/*===========================================================================*/
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/**
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* @brief I/O port A identifier.
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* @details This port identifier is mapped on the MSP430 port 1 (P1).
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*/
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#if defined(__MSP430_HAS_PORT1__) || \
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defined(__MSP430_HAS_PORT1_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_A ((ioportid_t)0x0020)
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#endif
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/**
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* @brief I/O port B identifier.
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* @details This port identifier is mapped on the MSP430 port 2 (P2).
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*/
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#if defined(__MSP430_HAS_PORT2__) || \
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defined(__MSP430_HAS_PORT2_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_B ((ioportid_t)0x0028)
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#endif
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/**
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* @brief I/O port C identifier.
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* @details This port identifier is mapped on the MSP430 port 3 (P3).
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*/
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#if defined(__MSP430_HAS_PORT3__) || \
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defined(__MSP430_HAS_PORT3_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_C ((ioportid_t)0x0018)
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#endif
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/**
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* @brief I/O port D identifier.
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* @details This port identifier is mapped on the MSP430 port 4 (P4).
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*/
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#if defined(__MSP430_HAS_PORT4__) || \
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defined(__MSP430_HAS_PORT4_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_D ((ioportid_t)0x001c)
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#endif
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/**
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* @brief I/O port E identifier.
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* @details This port identifier is mapped on the MSP430 port 5 (P5).
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*/
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#if defined(__MSP430_HAS_PORT5__) || \
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defined(__MSP430_HAS_PORT5_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_E ((ioportid_t)0x0030)
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#endif
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/**
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* @brief I/O port F identifier.
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* @details This port identifier is mapped on the MSP430 port 6 (P6).
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*/
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#if defined(__MSP430_HAS_PORT6__) || \
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defined(__MSP430_HAS_PORT6_R__) || \
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defined(__DOXYGEN__)
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#define IOPORT_F ((ioportid_t)0x0034)
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in a file named pal_lld.c. */
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/*===========================================================================*/
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/**
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* @brief Low level PAL subsystem initialization.
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* @details In MSP430 programs all the ports as input.
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*
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* @param[in] config the MSP430 ports configuration
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*/
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#define pal_lld_init(config) _pal_lld_init(config)
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/**
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* @brief Reads the physical I/O port states.
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* @details This function is implemented by reading the PxIN register, the
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* implementation has no side effects.
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*
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* @param[in] port the port identifier
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* @return The port bits.
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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*/
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#define pal_lld_readport(port) ((port)->iop_common.in.reg_p)
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/**
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* @brief Reads the output latch.
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* @details This function is implemented by reading the PxOUT register, the
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* implementation has no side effects.
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*
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* @param[in] port the port identifier
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* @return The latched logical states.
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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*/
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#define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p)
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/**
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* @brief Writes a bits mask on a I/O port.
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* @details This function is implemented by writing the PxOUT register, the
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* implementation has no side effects.
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*
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* @param[in] port the port identifier
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* @param[in] bits the bits to be written on the specified port
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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*/
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#define pal_lld_writeport(port, bits) { \
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(port)->iop_common.out.reg_p = (bits); \
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}
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/**
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* @brief Pads group mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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*
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* @param[in] port the port identifier
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* @param[in] mask the group mask
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* @param[in] mode the mode
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*
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* @note This function is not meant to be invoked directly by the application
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* code.
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* @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by
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* the MSP430x1xx Family User's Guide.
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* @note This function does not alter the @p PxSEL registers. Alternate
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* functions setup must be handled by device-specific code.
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*/
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#define pal_lld_setgroupmode(port, mask, mode) \
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_pal_lld_setgroupmode(port, mask, mode)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void _pal_lld_init(const MSP430DIOConfig *config);
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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uint_fast8_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _PAL_LLD_H_ */
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/** @} */
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