454 lines
13 KiB
C
454 lines
13 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/GPIOv2/pal_lld.h
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* @brief STM32L1xx/STM32F2xx/STM32F4xx GPIO low level driver header.
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*
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* @addtogroup PAL
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* @{
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*/
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#ifndef _PAL_LLD_H_
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#define _PAL_LLD_H_
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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#undef PAL_MODE_RESET
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#undef PAL_MODE_UNCONNECTED
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#undef PAL_MODE_INPUT
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_INPUT_ANALOG
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#undef PAL_MODE_OUTPUT_PUSHPULL
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/**
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* @name STM32-specific I/O mode flags
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* @{
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*/
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#define PAL_STM32_MODE_MASK (3 << 0)
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#define PAL_STM32_MODE_INPUT (0 << 0)
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#define PAL_STM32_MODE_OUTPUT (1 << 0)
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#define PAL_STM32_MODE_ALTERNATE (2 << 0)
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#define PAL_STM32_MODE_ANALOG (3 << 0)
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#define PAL_STM32_OTYPE_MASK (1 << 2)
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#define PAL_STM32_OTYPE_PUSHPULL (0 << 2)
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#define PAL_STM32_OTYPE_OPENDRAIN (1 << 2)
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#define PAL_STM32_OSPEED_MASK (3 << 3)
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#define PAL_STM32_OSPEED_LOWEST (0 << 3)
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#if defined(STM32F0XX) || defined(STM32F30X) || defined(STM32F37X)
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#define PAL_STM32_OSPEED_MID (1 << 3)
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#else
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#define PAL_STM32_OSPEED_MID1 (1 << 3)
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#define PAL_STM32_OSPEED_MID2 (2 << 3)
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#endif
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#define PAL_STM32_OSPEED_HIGHEST (3 << 3)
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#define PAL_STM32_PUDR_MASK (3 << 5)
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#define PAL_STM32_PUDR_FLOATING (0 << 5)
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#define PAL_STM32_PUDR_PULLUP (1 << 5)
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#define PAL_STM32_PUDR_PULLDOWN (2 << 5)
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#define PAL_STM32_ALTERNATE_MASK (15 << 7)
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#define PAL_STM32_ALTERNATE(n) ((n) << 7)
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/**
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* @brief Alternate function.
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*
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* @param[in] n alternate function selector
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*/
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#define PAL_MODE_ALTERNATE(n) (PAL_STM32_MODE_ALTERNATE | \
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PAL_STM32_ALTERNATE(n))
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/** @} */
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/**
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* @name Standard I/O mode flags
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* @{
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*/
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/**
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* @brief This mode is implemented as input.
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*/
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#define PAL_MODE_RESET PAL_STM32_MODE_INPUT
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/**
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* @brief This mode is implemented as input with pull-up.
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*/
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#define PAL_MODE_UNCONNECTED PAL_MODE_INPUT_PULLUP
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/**
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* @brief Regular input high-Z pad.
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*/
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#define PAL_MODE_INPUT PAL_STM32_MODE_INPUT
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/**
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* @brief Input pad with weak pull up resistor.
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*/
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#define PAL_MODE_INPUT_PULLUP (PAL_STM32_MODE_INPUT | \
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PAL_STM32_PUDR_PULLUP)
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/**
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* @brief Input pad with weak pull down resistor.
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*/
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#define PAL_MODE_INPUT_PULLDOWN (PAL_STM32_MODE_INPUT | \
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PAL_STM32_PUDR_PULLDOWN)
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/**
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* @brief Analog input mode.
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*/
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#define PAL_MODE_INPUT_ANALOG PAL_STM32_MODE_ANALOG
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/**
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* @brief Push-pull output pad.
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*/
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#define PAL_MODE_OUTPUT_PUSHPULL (PAL_STM32_MODE_OUTPUT | \
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PAL_STM32_OTYPE_PUSHPULL)
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/**
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* @brief Open-drain output pad.
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*/
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#define PAL_MODE_OUTPUT_OPENDRAIN (PAL_STM32_MODE_OUTPUT | \
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PAL_STM32_OTYPE_OPENDRAIN)
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/** @} */
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @brief STM32 GPIO registers block.
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*/
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typedef struct {
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volatile uint32_t MODER;
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volatile uint32_t OTYPER;
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volatile uint32_t OSPEEDR;
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volatile uint32_t PUPDR;
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volatile uint32_t IDR;
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volatile uint32_t ODR;
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volatile union {
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uint32_t W;
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struct {
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uint16_t set;
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uint16_t clear;
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} H;
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} BSRR;
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volatile uint32_t LCKR;
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volatile uint32_t AFRL;
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volatile uint32_t AFRH;
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} GPIO_TypeDef;
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/**
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* @brief GPIO port setup info.
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*/
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typedef struct {
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/** Initial value for MODER register.*/
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uint32_t moder;
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/** Initial value for OTYPER register.*/
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uint32_t otyper;
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/** Initial value for OSPEEDR register.*/
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uint32_t ospeedr;
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/** Initial value for PUPDR register.*/
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uint32_t pupdr;
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/** Initial value for ODR register.*/
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uint32_t odr;
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/** Initial value for AFRL register.*/
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uint32_t afrl;
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/** Initial value for AFRH register.*/
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uint32_t afrh;
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} stm32_gpio_setup_t;
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/**
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* @brief STM32 GPIO static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialize the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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/** @brief Port A setup data.*/
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stm32_gpio_setup_t PAData;
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/** @brief Port B setup data.*/
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stm32_gpio_setup_t PBData;
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/** @brief Port C setup data.*/
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stm32_gpio_setup_t PCData;
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/** @brief Port D setup data.*/
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stm32_gpio_setup_t PDData;
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#if STM32_HAS_GPIOE
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/** @brief Port E setup data.*/
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stm32_gpio_setup_t PEData;
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#endif
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#if STM32_HAS_GPIOF
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/** @brief Port F setup data.*/
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stm32_gpio_setup_t PFData;
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#endif
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#if STM32_HAS_GPIOG
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/** @brief Port G setup data.*/
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stm32_gpio_setup_t PGData;
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#endif
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#if STM32_HAS_GPIOH
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/** @brief Port H setup data.*/
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stm32_gpio_setup_t PHData;
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#endif
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#if STM32_HAS_GPIOI
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/** @brief Port I setup data.*/
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stm32_gpio_setup_t PIData;
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#endif
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} PALConfig;
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/**
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* @brief Width, in bits, of an I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 16
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/**
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* @brief Whole port mask.
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* @details This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)
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/**
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* @brief Digital I/O port sized unsigned type.
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*/
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typedef uint32_t ioportmask_t;
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/**
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* @brief Digital I/O modes.
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*/
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typedef uint32_t iomode_t;
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/**
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* @brief Port Identifier.
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* @details This type can be a scalar or some kind of pointer, do not make
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* any assumption about it, use the provided macros when populating
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* variables of this type.
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*/
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typedef GPIO_TypeDef * ioportid_t;
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/*===========================================================================*/
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/* I/O Ports Identifiers. */
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/* The low level driver wraps the definitions already present in the STM32 */
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/* firmware library. */
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/*===========================================================================*/
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/**
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* @brief GPIO port A identifier.
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*/
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#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
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#define IOPORT1 GPIOA
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#endif
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/**
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* @brief GPIO port B identifier.
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*/
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#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
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#define IOPORT2 GPIOB
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#endif
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/**
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* @brief GPIO port C identifier.
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*/
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#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
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#define IOPORT3 GPIOC
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#endif
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/**
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* @brief GPIO port D identifier.
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*/
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#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
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#define IOPORT4 GPIOD
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#endif
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/**
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* @brief GPIO port E identifier.
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*/
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#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
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#define IOPORT5 GPIOE
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#endif
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/**
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* @brief GPIO port F identifier.
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*/
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#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
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#define IOPORT6 GPIOF
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#endif
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/**
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* @brief GPIO port G identifier.
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*/
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#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
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#define IOPORT7 GPIOG
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#endif
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/**
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* @brief GPIO port H identifier.
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*/
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#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
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#define IOPORT8 GPIOH
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#endif
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/**
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* @brief GPIO port I identifier.
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*/
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#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
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#define IOPORT9 GPIOI
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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/*===========================================================================*/
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/**
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* @brief GPIO ports subsystem initialization.
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*
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* @notapi
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*/
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#define pal_lld_init(config) _pal_lld_init(config)
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/**
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* @brief Reads an I/O port.
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* @details This function is implemented by reading the GPIO IDR register, the
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* implementation has no side effects.
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* @note This function is not meant to be invoked directly by the application
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* code.
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*
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* @param[in] port port identifier
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* @return The port bits.
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*
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* @notapi
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*/
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#define pal_lld_readport(port) ((port)->IDR)
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/**
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* @brief Reads the output latch.
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* @details This function is implemented by reading the GPIO ODR register, the
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* implementation has no side effects.
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* @note This function is not meant to be invoked directly by the application
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* code.
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*
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* @param[in] port port identifier
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* @return The latched logical states.
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*
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* @notapi
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*/
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#define pal_lld_readlatch(port) ((port)->ODR)
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/**
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* @brief Writes on a I/O port.
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* @details This function is implemented by writing the GPIO ODR register, the
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* implementation has no side effects.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be written on the specified port
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*
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* @notapi
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*/
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#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
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/**
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* @brief Sets a bits mask on a I/O port.
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* @details This function is implemented by writing the GPIO BSRR register, the
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* implementation has no side effects.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be ORed on the specified port
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*
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* @notapi
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*/
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#define pal_lld_setport(port, bits) ((port)->BSRR.H.set = (uint16_t)(bits))
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/**
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* @brief Clears a bits mask on a I/O port.
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* @details This function is implemented by writing the GPIO BSRR register, the
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* implementation has no side effects.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be cleared on the specified port
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*
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* @notapi
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*/
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#define pal_lld_clearport(port, bits) ((port)->BSRR.H.clear = (uint16_t)(bits))
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|
|
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||
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|
/**
|
||
|
|
* @brief Writes a group of bits.
|
||
|
|
* @details This function is implemented by writing the GPIO BSRR register, the
|
||
|
|
* implementation has no side effects.
|
||
|
|
*
|
||
|
|
* @param[in] port port identifier
|
||
|
|
* @param[in] mask group mask
|
||
|
|
* @param[in] offset the group bit offset within the port
|
||
|
|
* @param[in] bits bits to be written. Values exceeding the group
|
||
|
|
* width are masked.
|
||
|
|
*
|
||
|
|
* @notapi
|
||
|
|
*/
|
||
|
|
#define pal_lld_writegroup(port, mask, offset, bits) \
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||
|
|
((port)->BSRR.W = ((~(bits) & (mask)) << (16 + (offset))) | \
|
||
|
|
(((bits) & (mask)) << (offset)))
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Pads group mode setup.
|
||
|
|
* @details This function programs a pads group belonging to the same port
|
||
|
|
* with the specified mode.
|
||
|
|
*
|
||
|
|
* @param[in] port port identifier
|
||
|
|
* @param[in] mask group mask
|
||
|
|
* @param[in] offset group bit offset within the port
|
||
|
|
* @param[in] mode group mode
|
||
|
|
*
|
||
|
|
* @notapi
|
||
|
|
*/
|
||
|
|
#define pal_lld_setgroupmode(port, mask, offset, mode) \
|
||
|
|
_pal_lld_setgroupmode(port, mask << offset, mode)
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Writes a logical state on an output pad.
|
||
|
|
*
|
||
|
|
* @param[in] port port identifier
|
||
|
|
* @param[in] pad pad number within the port
|
||
|
|
* @param[in] bit logical value, the value must be @p PAL_LOW or
|
||
|
|
* @p PAL_HIGH
|
||
|
|
*
|
||
|
|
* @notapi
|
||
|
|
*/
|
||
|
|
#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)
|
||
|
|
|
||
|
|
extern const PALConfig pal_default_config;
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
extern "C" {
|
||
|
|
#endif
|
||
|
|
void _pal_lld_init(const PALConfig *config);
|
||
|
|
void _pal_lld_setgroupmode(ioportid_t port,
|
||
|
|
ioportmask_t mask,
|
||
|
|
iomode_t mode);
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* HAL_USE_PAL */
|
||
|
|
|
||
|
|
#endif /* _PAL_LLD_H_ */
|
||
|
|
|
||
|
|
/** @} */
|