335 lines
10 KiB
C
335 lines
10 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/GPIOv1/pal_lld.h
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* @brief STM32F1xx GPIO low level driver header.
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*
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* @addtogroup PAL
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* @{
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*/
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#ifndef _PAL_LLD_H_
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#define _PAL_LLD_H_
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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/**
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* @name STM32-specific I/O mode flags
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* @{
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*/
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/**
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* @brief STM32 specific alternate push-pull output mode.
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*/
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#define PAL_MODE_STM32_ALTERNATE_PUSHPULL 16
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/**
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* @brief STM32 specific alternate open-drain output mode.
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*/
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#define PAL_MODE_STM32_ALTERNATE_OPENDRAIN 17
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/** @} */
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @brief GPIO port setup info.
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*/
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typedef struct {
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/** Initial value for ODR register.*/
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uint32_t odr;
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/** Initial value for CRL register.*/
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uint32_t crl;
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/** Initial value for CRH register.*/
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uint32_t crh;
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} stm32_gpio_setup_t;
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/**
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* @brief STM32 GPIO static initializer.
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* @details An instance of this structure must be passed to @p palInit() at
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* system startup time in order to initialize the digital I/O
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* subsystem. This represents only the initial setup, specific pads
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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/** @brief Port A setup data.*/
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stm32_gpio_setup_t PAData;
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/** @brief Port B setup data.*/
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stm32_gpio_setup_t PBData;
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/** @brief Port C setup data.*/
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stm32_gpio_setup_t PCData;
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/** @brief Port D setup data.*/
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stm32_gpio_setup_t PDData;
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#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
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/** @brief Port E setup data.*/
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stm32_gpio_setup_t PEData;
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#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
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/** @brief Port F setup data.*/
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stm32_gpio_setup_t PFData;
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#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
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/** @brief Port G setup data.*/
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stm32_gpio_setup_t PGData;
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#endif
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#endif
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#endif
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} PALConfig;
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/**
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* @brief Width, in bits, of an I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 16
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/**
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* @brief Whole port mask.
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* @details This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)
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/**
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* @brief Digital I/O port sized unsigned type.
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*/
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typedef uint32_t ioportmask_t;
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/**
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* @brief Digital I/O modes.
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*/
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typedef uint32_t iomode_t;
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/**
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* @brief Port Identifier.
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* @details This type can be a scalar or some kind of pointer, do not make
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* any assumption about it, use the provided macros when populating
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* variables of this type.
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*/
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typedef GPIO_TypeDef * ioportid_t;
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/*===========================================================================*/
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/* I/O Ports Identifiers. */
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/* The low level driver wraps the definitions already present in the STM32 */
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/* firmware library. */
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/*===========================================================================*/
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/**
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* @brief GPIO port A identifier.
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*/
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#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
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#define IOPORT1 GPIOA
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#endif
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/**
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* @brief GPIO port B identifier.
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*/
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#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
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#define IOPORT2 GPIOB
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#endif
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/**
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* @brief GPIO port C identifier.
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*/
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#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
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#define IOPORT3 GPIOC
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#endif
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/**
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* @brief GPIO port D identifier.
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*/
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#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
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#define IOPORT4 GPIOD
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#endif
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/**
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* @brief GPIO port E identifier.
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*/
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#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
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#define IOPORT5 GPIOE
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#endif
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/**
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* @brief GPIO port F identifier.
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*/
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#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
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#define IOPORT6 GPIOF
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#endif
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/**
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* @brief GPIO port G identifier.
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*/
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#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
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#define IOPORT7 GPIOG
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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/*===========================================================================*/
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/**
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* @brief GPIO ports subsystem initialization.
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*
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* @notapi
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*/
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#define pal_lld_init(config) _pal_lld_init(config)
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/**
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* @brief Reads an I/O port.
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* @details This function is implemented by reading the GPIO IDR register, the
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* implementation has no side effects.
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* @note This function is not meant to be invoked directly by the application
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* code.
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*
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* @param[in] port port identifier
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* @return The port bits.
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*
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* @notapi
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*/
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#define pal_lld_readport(port) ((port)->IDR)
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/**
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* @brief Reads the output latch.
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* @details This function is implemented by reading the GPIO ODR register, the
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* implementation has no side effects.
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* @note This function is not meant to be invoked directly by the application
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* code.
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*
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* @param[in] port port identifier
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* @return The latched logical states.
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*
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* @notapi
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*/
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#define pal_lld_readlatch(port) ((port)->ODR)
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/**
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* @brief Writes on a I/O port.
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* @details This function is implemented by writing the GPIO ODR register, the
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* implementation has no side effects.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be written on the specified port
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*
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* @notapi
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*/
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#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
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/**
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* @brief Sets a bits mask on a I/O port.
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* @details This function is implemented by writing the GPIO BSRR register, the
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* implementation has no side effects.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be ORed on the specified port
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*
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* @notapi
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*/
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#define pal_lld_setport(port, bits) ((port)->BSRR = (bits))
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/**
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* @brief Clears a bits mask on a I/O port.
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* @details This function is implemented by writing the GPIO BRR register, the
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* implementation has no side effects.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] bits bits to be cleared on the specified port
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*
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* @notapi
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*/
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#define pal_lld_clearport(port, bits) ((port)->BRR = (bits))
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/**
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* @brief Writes a group of bits.
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* @details This function is implemented by writing the GPIO BSRR register, the
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* implementation has no side effects.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] mask group mask
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* @param[in] offset the group bit offset within the port
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* @param[in] bits bits to be written. Values exceeding the group
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* width are masked.
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*
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* @notapi
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*/
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#define pal_lld_writegroup(port, mask, offset, bits) \
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((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
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(((bits) & (mask)) << (offset)))
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/**
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* @brief Pads group mode setup.
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* @details This function programs a pads group belonging to the same port
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* with the specified mode.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] mask group mask
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* @param[in] offset group bit offset within the port
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* @param[in] mode group mode
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*
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* @notapi
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*/
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#define pal_lld_setgroupmode(port, mask, offset, mode) \
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_pal_lld_setgroupmode(port, mask << offset, mode)
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/**
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* @brief Writes a logical state on an output pad.
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* @note Writing on pads programmed as pull-up or pull-down has the side
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* effect to modify the resistor setting because the output latched
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* data is used for the resistor selection.
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*
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* @param[in] port port identifier
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* @param[in] pad pad number within the port
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* @param[in] bit logical value, the value must be @p PAL_LOW or
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* @p PAL_HIGH
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*
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* @notapi
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*/
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#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)
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extern const PALConfig pal_default_config;
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#ifdef __cplusplus
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extern "C" {
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#endif
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void _pal_lld_init(const PALConfig *config);
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void _pal_lld_setgroupmode(ioportid_t port,
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ioportmask_t mask,
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iomode_t mode);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_PAL */
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#endif /* _PAL_LLD_H_ */
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/** @} */
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