2009-11-14 14:57:32 +00:00
|
|
|
/*
|
|
|
|
|
ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
|
|
|
|
|
|
|
|
|
|
This file is part of ChibiOS/RT.
|
|
|
|
|
|
|
|
|
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
|
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef _BOARD_H_
|
|
|
|
|
#define _BOARD_H_
|
|
|
|
|
|
|
|
|
|
/*
|
2009-12-05 14:59:37 +00:00
|
|
|
* Board frequencies.
|
2009-11-14 14:57:32 +00:00
|
|
|
*/
|
|
|
|
|
#define LSECLK 32768
|
|
|
|
|
#define HSECLK 8000000
|
|
|
|
|
#define HSICLK 8000000
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* IO pins assignments.
|
|
|
|
|
*/
|
|
|
|
|
#define GPIOA_BUTTON 0
|
|
|
|
|
#define GPIOA_SPI1NSS 4
|
|
|
|
|
|
|
|
|
|
#define GPIOB_SPI2NSS 12
|
|
|
|
|
|
|
|
|
|
#define GPIOC_MMCWP 6
|
|
|
|
|
#define GPIOC_MMCCP 7
|
|
|
|
|
#define GPIOC_CANCNTL 10
|
|
|
|
|
#define GPIOC_DISC 11
|
|
|
|
|
#define GPIOC_LED 12
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* All inputs with pullups unless otherwise specified.
|
|
|
|
|
*/
|
|
|
|
|
#define VAL_GPIOACRL 0x88888884 // PA0:FI
|
|
|
|
|
#define VAL_GPIOACRH 0x88888888
|
|
|
|
|
#define VAL_GPIOAODR 0xFFFFFFFF
|
|
|
|
|
|
|
|
|
|
#define VAL_GPIOBCRL 0x88883888 // PB3:PP
|
|
|
|
|
#define VAL_GPIOBCRH 0x88888888
|
|
|
|
|
#define VAL_GPIOBODR 0xFFFFFFFF
|
|
|
|
|
|
|
|
|
|
#define VAL_GPIOCCRL 0x44888888 // PC6,PC7:FI
|
|
|
|
|
#define VAL_GPIOCCRH 0x88833888 // PC11,PC12:PP
|
|
|
|
|
#define VAL_GPIOCODR 0xFFFFFFFF
|
|
|
|
|
|
|
|
|
|
#define VAL_GPIODCRL 0x88888844 // PD0,PD1:FI
|
|
|
|
|
#define VAL_GPIODCRH 0x88888888
|
|
|
|
|
#define VAL_GPIODODR 0xFFFFFFFF
|
|
|
|
|
|
|
|
|
|
#define VAL_GPIOECRL 0x88888888
|
|
|
|
|
#define VAL_GPIOECRH 0x88888888
|
|
|
|
|
#define VAL_GPIOEODR 0xFFFFFFFF
|
|
|
|
|
|
|
|
|
|
#endif /* _BOARD_H_ */
|
