170 lines
7.2 KiB
C
170 lines
7.2 KiB
C
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/*
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file eMIOS_v1/spc5_emios.h
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* @brief SPC5xx low level ICU - PWM driver common header.
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*
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* @addtogroup ICU - PWM
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* @{
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*/
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#ifndef _SPC5_EMIOS_H_
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#define _SPC5_EMIOS_H_
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#if HAL_USE_ICU || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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#define EMIOSMCR_MDIS (1U << 30U)
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#define EMIOSMCR_FRZ (1U << 29U)
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#define EMIOSMCR_GTBE (1U << 28U)
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#define EMIOSMCR_GPREN (1U << 26U)
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#define EMIOSMCR_GPRE(n) ((n) << 8U)
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#define EMIOSC_FREN (1U << 31U)
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#define EMIOSC_UCPRE(n) ((n) << 26U)
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#define EMIOSC_UCPREN (1U << 25U)
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#define EMIOSC_DMA (1U << 24U)
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#define EMIOSC_IF(n) ((n) << 19U)
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#define EMIOSC_FCK (1U << 18U)
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#define EMIOSC_FEN (1U << 17U)
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#define EMIOSC_FORCMA (1U << 13U)
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#define EMIOSC_FORCMB (1U << 12U)
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#define EMIOSC_BSL(n) ((n) << 9U)
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#define EMIOSC_EDSEL (1U << 8U)
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#define EMIOSC_EDPOL (1U << 7U)
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#define EMIOSC_MODE(n) ((n) << 0)
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#define EMIOS_BSL_COUNTER_BUS_A 0
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#define EMIOS_BSL_COUNTER_BUS_2 1U
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#define EMIOS_BSL_INTERNAL_COUNTER 3U
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#define EMIOS_CCR_MODE_GPIO_IN 0
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#define EMIOS_CCR_MODE_GPIO_OUT 1U
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#define EMIOS_CCR_MODE_SAIC 2U
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#define EMIOS_CCR_MODE_SAOC 3U
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#define EMIOS_CCR_MODE_IPWM 4U
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#define EMIOS_CCR_MODE_IPM 5U
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#define EMIOS_CCR_MODE_DAOC_B_MATCH 6U
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#define EMIOS_CCR_MODE_DAOC_BOTH_MATCH 7U
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#define EMIOS_CCR_MODE_MC_CMS 16U
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#define EMIOS_CCR_MODE_MC_CME 17U
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#define EMIOS_CCR_MODE_MC_UP_DOWN 18U
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#define EMIOS_CCR_MODE_OPWMT 38U
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#define EMIOS_CCR_MODE_MCB_UP 80U
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#define EMIOS_CCR_MODE_MCB_UP_DOWN 84U
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#define EMIOS_CCR_MODE_OPWFMB 88U
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#define EMIOS_CCR_MODE_OPWMCB_TE 92U
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#define EMIOS_CCR_MODE_OPWMCB_LE 93U
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#define EMIOS_CCR_MODE_OPWMB 96U
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#define EMIOSS_OVR (1U << 31U)
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#define EMIOSS_OVRC (1U << 31U)
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#define EMIOSS_OVFL (1U << 15U)
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#define EMIOSS_OVFLC (1U << 15U)
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#define EMIOSS_FLAG (1U << 0)
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#define EMIOSS_FLAGC (1U << 0)
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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#if SPC5_HAS_EMIOS0
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/**
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* @brief eMIOS0 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_EMIOS0_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_EMIOS0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief eMIOS0 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_EMIOS0_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_EMIOS0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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#endif
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#if SPC5_HAS_EMIOS1
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/**
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* @brief eMIOS1 peripheral configuration when started.
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* @note The default configuration is 1 (always run) in run mode and
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* 2 (only halt) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_EMIOS1_START_PCTL) || defined(__DOXYGEN__)
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#define SPC5_EMIOS1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \
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SPC5_ME_PCTL_LP(2))
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#endif
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/**
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* @brief eMIOS1 peripheral configuration when stopped.
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* @note The default configuration is 0 (never run) in run mode and
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* 0 (never run) in low power mode. The defaults of the run modes
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* are defined in @p hal_lld.h.
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*/
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#if !defined(SPC5_EMIOS1_STOP_PCTL) || defined(__DOXYGEN__)
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#define SPC5_EMIOS1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \
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SPC5_ME_PCTL_LP(0))
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#endif
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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void reset_emios0_active_channels(void);
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void reset_emios1_active_channels(void);
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uint32_t get_emios0_active_channels(void);
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uint32_t get_emios1_active_channels(void);
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void increase_emios0_active_channels(void);
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void decrease_emios0_active_channels(void);
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void increase_emios1_active_channels(void);
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void decrease_emios1_active_channels(void);
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void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
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void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp);
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void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp);
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void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp);
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#endif /* HAL_USE_ICU */
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#endif /* _SPC5_EMIOS_H_ */
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/** @} */
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