168 lines
6.8 KiB
C
168 lines
6.8 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <ch.h>
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#include "lpc214x.h"
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/*
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* System idle thread loop.
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*/
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void _IdleThread(void *p) {
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while (TRUE) {
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// Note, it is disabled because it causes trouble with the JTAG probe.
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// Enable it in the final code only.
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// PCON = 1;
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}
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}
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/*
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* System console message (not implemented).
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*/
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void chSysPuts(char *msg) {
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}
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/*
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* Common IRQ exit code, \p chSysIRQExitI() just jumps here.
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*
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* System stack frame structure after a context switch in the
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* interrupt handler:
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*
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* High +------------+
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* | LR_USR | -+
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* | R12 | |
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* | R3 | |
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* | R2 | | External context: IRQ handler frame
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* | R1 | |
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* | R0 | |
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* | LR_IRQ | | (user code return address)
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* | SPSR | -+ (user code status)
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* | .... | <- chSchDoRescheduleI() stack frame, optimize it for space
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* | LR | -+ (system code return address)
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* | R11 | |
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* | R10 | |
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* | R9 | |
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* | R8 | | Internal context: chSysSwitchI() frame
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* | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
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* | R6 | |
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* | R5 | |
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* SP-> | R4 | -+
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* Low +------------+
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*/
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__attribute__((naked, weak))
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void IrqCommon(void) {
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register BOOL b asm("r0");
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VICVectAddr = 0;
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b = chSchRescRequiredI();
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov lr, pc \n\t" \
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"bx lr \n\t" \
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".code 32 \n\t");
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#endif
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/*
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* If a reschedulation is not required then just returns from the IRQ.
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*/
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asm("cmp r0, #0 \n\t" \
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"ldmeqfd sp!, {r0-r3, r12, lr} \n\t" \
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"subeqs pc, lr, #4 \n\t");
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/*
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* Reschedulation required, saves the external context on the
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* system/user stack and empties the IRQ stack.
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*/
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asm(".set MODE_IRQ, 0x12 \n\t" \
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".set MODE_SYS, 0x1F \n\t" \
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".set F_BIT, 0x40 \n\t" \
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".set I_BIT, 0x80 \n\t" \
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"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"stmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"mrs r0, SPSR \n\t" \
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"mov r1, lr \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"stmfd sp!, {r0, r1} \n\t");
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#ifdef THUMB_NO_INTERWORKING
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asm("add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t" \
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"bl chSchDoRescheduleI \n\t" \
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".p2align 2,, \n\t" \
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"mov lr, pc \n\t" \
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"bx lr \n\t" \
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".code 32 \n\t");
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#else
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asm("bl chSchDoRescheduleI \n\t");
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#endif
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/*
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* Restores the external context.
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*/
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asm("ldmfd sp!, {r0, r1} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"msr SPSR_fsxc, r0 \n\t" \
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"mov lr, r1 \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"subs pc, lr, #4 \n\t");
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/*
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* Threads entry/exit code. It is declared weak so you can easily replace it.
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* NOTE: It is always invoked in ARM mode, it does the mode switching.
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* NOTE: It is included into IrqCommon to make sure the symbol refers to
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* 32 bit code.
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*/
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asm(".weak threadstart \n\t" \
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".globl threadstart \n\t" \
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"threadstart: \n\t" \
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"msr CPSR_c, #MODE_SYS \n\t");
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#ifndef THUMB_NO_INTERWORKING
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asm("mov r0, r5 \n\t" \
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"mov lr, pc \n\t" \
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"bx r4 \n\t" \
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"bl chThdExit \n\t");
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#else
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asm("add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t" \
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"mov r0, r5 \n\t" \
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"bl jmpr4 \n\t" \
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"bl chThdExit \n\t" \
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"jmpr4: \n\t" \
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"bx r4 \n\t");
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#endif
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}
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/*
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* System halt.
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*/
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__attribute__((naked, weak))
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void chSysHalt(void) {
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#ifdef THUMB
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asm("ldr r0, =_halt32 \n\t" \
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"bx r0 \n\t");
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#endif
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asm("b _halt32 \n\t");
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}
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