2010-04-04 16:34:04 +00:00
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/*
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2011-03-18 18:38:08 +00:00
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2012-01-21 14:29:42 +00:00
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2011,2012 Giovanni Di Sirio.
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2010-04-04 16:34:04 +00:00
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file LPC13xx/hal_lld.c
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* @brief LPC13xx HAL subsystem low level driver source.
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*
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2010-10-26 17:39:29 +00:00
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* @addtogroup HAL
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2010-04-04 16:34:04 +00:00
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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2011-01-06 12:18:51 +00:00
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* @brief Register missing in NXP header file.
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2010-04-04 16:34:04 +00:00
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*/
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#define FLASHCFG (*((volatile uint32_t *)0x4003C010))
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level HAL driver initialization.
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2010-10-04 17:16:18 +00:00
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*
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* @notapi
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2010-04-04 16:34:04 +00:00
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*/
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void hal_lld_init(void) {
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/* SysTick initialization using the system clock.*/
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2011-12-21 18:49:04 +00:00
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nvicSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);
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2010-04-05 07:24:32 +00:00
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SysTick->LOAD = LPC13xx_SYSCLK / CH_FREQUENCY - 1;
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2010-04-04 16:34:04 +00:00
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SysTick->VAL = 0;
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
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SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_TICKINT_Msk;
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}
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/**
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* @brief LPC13xx clocks and PLL initialization.
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* @note All the involved constants come from the file @p board.h.
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2010-10-04 17:16:18 +00:00
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* @note This function must be invoked only after the system reset.
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*
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* @special
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2010-04-04 16:34:04 +00:00
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*/
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void LPC13xx_clock_init(void) {
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unsigned i;
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/* Flash wait states setting, the code takes care to not touch TBD bits.*/
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2010-04-05 07:24:32 +00:00
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FLASHCFG = (FLASHCFG & ~3) | LPC13xx_FLASHCFG_FLASHTIM;
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2010-04-04 16:34:04 +00:00
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/* System oscillator initialization if required.*/
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2010-04-05 07:24:32 +00:00
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#if LPC13xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT
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#if LPC13xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC
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LPC_SYSCON->SYSOSCCTRL = LPC13xx_SYSOSCCTRL;
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2010-04-04 16:34:04 +00:00
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LPC_SYSCON->PDRUNCFG &= ~(1 << 5); /* System oscillator ON. */
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for (i = 0; i < 200; i++)
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__NOP(); /* Stabilization delay. */
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2010-04-05 07:24:32 +00:00
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#endif /* LPC13xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC */
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2010-04-04 16:34:04 +00:00
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/* PLL initialization if required.*/
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2010-04-05 07:24:32 +00:00
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LPC_SYSCON->SYSPLLCLKSEL = LPC13xx_PLLCLK_SOURCE;
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2010-04-04 16:34:04 +00:00
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LPC_SYSCON->SYSPLLCLKUEN = 1; /* Really required? */
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LPC_SYSCON->SYSPLLCLKUEN = 0;
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LPC_SYSCON->SYSPLLCLKUEN = 1;
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2010-04-05 07:24:32 +00:00
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LPC_SYSCON->SYSPLLCTRL = LPC13xx_SYSPLLCTRL_MSEL | LPC13xx_SYSPLLCTRL_PSEL;
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2010-04-04 16:34:04 +00:00
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LPC_SYSCON->PDRUNCFG &= ~(1 << 7); /* System PLL ON. */
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while ((LPC_SYSCON->SYSPLLSTAT & 1) == 0) /* Wait PLL lock. */
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;
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2010-04-05 07:24:32 +00:00
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#endif /* LPC13xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT */
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2010-04-04 16:34:04 +00:00
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/* Main clock source selection.*/
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2010-04-05 07:24:32 +00:00
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LPC_SYSCON->MAINCLKSEL = LPC13xx_MAINCLK_SOURCE;
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2010-04-04 16:34:04 +00:00
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LPC_SYSCON->MAINCLKUEN = 1; /* Really required? */
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LPC_SYSCON->MAINCLKUEN = 0;
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LPC_SYSCON->MAINCLKUEN = 1;
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while ((LPC_SYSCON->MAINCLKUEN & 1) == 0) /* Wait switch completion. */
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;
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/* ABH divider initialization, peripheral clocks are initially disabled,
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the various device drivers will handle their own setup except GPIO and
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IOCON that are left enabled.*/
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2010-04-05 07:24:32 +00:00
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LPC_SYSCON->SYSAHBCLKDIV = LPC13xx_SYSABHCLK_DIV;
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2010-04-04 16:34:04 +00:00
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LPC_SYSCON->SYSAHBCLKCTRL = 0x0001005F;
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/* Memory remapping, vectors always in ROM.*/
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LPC_SYSCON->SYSMEMREMAP = 2;
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}
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/** @} */
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