2012-12-17 11:02:50 +00:00
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/*
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2013-04-11 12:23:05 +00:00
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SPC5 HAL - Copyright (C) 2013 STMicroelectronics
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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2012-12-17 11:02:50 +00:00
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/**
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* @file SPC563Mxx/spc563m_registry.h
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* @brief SPC563Mxx capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef _SPC563M_REGISTRY_H_
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#define _SPC563M_REGISTRY_H_
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name SPC563Mxx capabilities
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* @{
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*/
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2013-03-26 15:02:45 +00:00
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/* DSPI attribures.*/
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#define SPC5_HAS_DSPI0 FALSE
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#define SPC5_HAS_DSPI1 TRUE
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#define SPC5_HAS_DSPI2 TRUE
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#define SPC5_HAS_DSPI3 FALSE
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2013-06-07 13:26:44 +00:00
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#define SPC5_HAS_DSPI4 FALSE
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2013-03-26 15:02:45 +00:00
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#define SPC5_DSPI_FIFO_DEPTH 16
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#define SPC5_DSPI1_EOQF_HANDLER vector132
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#define SPC5_DSPI1_EOQF_NUMBER 132
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2013-06-03 14:40:57 +00:00
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#define SPC5_DSPI1_TFFF_HANDLER vector133
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#define SPC5_DSPI1_TFFF_NUMBER 133
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2013-03-26 15:02:45 +00:00
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#define SPC5_DSPI2_EOQF_HANDLER vector137
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#define SPC5_DSPI2_EOQF_NUMBER 137
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2013-06-03 14:40:57 +00:00
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#define SPC5_DSPI2_TFFF_HANDLER vector138
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#define SPC5_DSPI2_TFFF_NUMBER 138
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2013-03-26 15:02:45 +00:00
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#define SPC5_DSPI1_ENABLE_CLOCK()
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#define SPC5_DSPI1_DISABLE_CLOCK()
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#define SPC5_DSPI2_ENABLE_CLOCK()
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#define SPC5_DSPI2_DISABLE_CLOCK()
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2013-03-01 14:37:07 +00:00
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/* eDMA attributes.*/
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2013-04-02 12:56:55 +00:00
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#define SPC5_HAS_EDMA TRUE
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2013-03-04 11:10:29 +00:00
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#define SPC5_EDMA_NCHANNELS 32
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2013-03-04 08:57:20 +00:00
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#define SPC5_EDMA_HAS_MUX FALSE
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2013-06-17 07:01:48 +00:00
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#define SPC5_SPI_DSPI1_TX1_DMA_CH_ID 12
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#define SPC5_SPI_DSPI1_TX2_DMA_CH_ID 25
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#define SPC5_SPI_DSPI1_RX_DMA_CH_ID 13
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#define SPC5_SPI_DSPI2_TX1_DMA_CH_ID 14
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#define SPC5_SPI_DSPI2_TX2_DMA_CH_ID 26
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#define SPC5_SPI_DSPI2_RX_DMA_CH_ID 15
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2013-03-01 14:37:07 +00:00
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2013-02-27 15:57:45 +00:00
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/* eQADC attributes.*/
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#define SPC5_HAS_EQADC TRUE
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2012-12-17 11:02:50 +00:00
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/* eSCI attributes.*/
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#define SPC5_HAS_ESCIA TRUE
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#define SPC5_ESCIA_HANDLER vector146
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#define SPC5_ESCIA_NUMBER 146
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#define SPC5_HAS_ESCIB TRUE
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#define SPC5_ESCIB_HANDLER vector149
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#define SPC5_ESCIB_NUMBER 149
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2013-03-13 12:55:10 +00:00
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#define SPC5_HAS_ESCIC FALSE
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2012-12-17 11:02:50 +00:00
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/* SIU attributes.*/
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#define SPC5_HAS_SIU TRUE
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#define SPC5_SIU_SUPPORTS_PORTS FALSE
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2013-05-15 13:42:41 +00:00
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/* EMIOS attributes.*/
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#define SPC5_HAS_EMIOS TRUE
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#define SPC5_EMIOS_NUM_CHANNELS 16
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#define SPC5_EMIOS_FLAG_F0_HANDLER vector51
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#define SPC5_EMIOS_FLAG_F1_HANDLER vector52
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#define SPC5_EMIOS_FLAG_F2_HANDLER vector53
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#define SPC5_EMIOS_FLAG_F3_HANDLER vector54
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#define SPC5_EMIOS_FLAG_F4_HANDLER vector55
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#define SPC5_EMIOS_FLAG_F5_HANDLER vector56
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#define SPC5_EMIOS_FLAG_F6_HANDLER vector57
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#define SPC5_EMIOS_FLAG_F8_HANDLER vector59
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#define SPC5_EMIOS_FLAG_F9_HANDLER vector60
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#define SPC5_EMIOS_FLAG_F10_HANDLER vector61
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#define SPC5_EMIOS_FLAG_F11_HANDLER vector62
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#define SPC5_EMIOS_FLAG_F12_HANDLER vector63
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#define SPC5_EMIOS_FLAG_F13_HANDLER vector64
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#define SPC5_EMIOS_FLAG_F14_HANDLER vector65
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#define SPC5_EMIOS_FLAG_F15_HANDLER vector66
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#define SPC5_EMIOS_FLAG_F23_HANDLER vector209
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#define SPC5_EMIOS_FLAG_F0_NUMBER 51
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#define SPC5_EMIOS_FLAG_F1_NUMBER 52
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#define SPC5_EMIOS_FLAG_F2_NUMBER 53
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#define SPC5_EMIOS_FLAG_F3_NUMBER 54
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#define SPC5_EMIOS_FLAG_F4_NUMBER 55
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#define SPC5_EMIOS_FLAG_F5_NUMBER 56
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#define SPC5_EMIOS_FLAG_F6_NUMBER 57
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#define SPC5_EMIOS_FLAG_F8_NUMBER 59
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#define SPC5_EMIOS_FLAG_F9_NUMBER 60
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#define SPC5_EMIOS_FLAG_F10_NUMBER 61
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#define SPC5_EMIOS_FLAG_F11_NUMBER 62
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#define SPC5_EMIOS_FLAG_F12_NUMBER 63
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#define SPC5_EMIOS_FLAG_F13_NUMBER 64
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#define SPC5_EMIOS_FLAG_F14_NUMBER 65
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#define SPC5_EMIOS_FLAG_F15_NUMBER 66
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#define SPC5_EMIOS_FLAG_F23_NUMBER 209
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2013-06-01 08:46:31 +00:00
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#define SPC5_EMIOS_CLK (SPC5_SYSCLK / \
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2013-06-22 16:45:14 +00:00
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SPC5_EMIOS_GPRE_VALUE)
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2013-05-15 13:42:41 +00:00
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#define SPC5_EMIOS_ENABLE_CLOCK()
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#define SPC5_EMIOS_DISABLE_CLOCK()
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2013-06-22 18:45:35 +00:00
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/* FlexCAN attributes.*/
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#define SPC5_HAS_FLEXCAN0 TRUE
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#define SPC5_FLEXCAN0_MB 64
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#define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER vector152
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#define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER vector153
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER vector155
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_01_HANDLER vector156
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_02_HANDLER vector157
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_03_HANDLER vector158
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_04_HANDLER vector159
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_05_HANDLER vector160
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_06_HANDLER vector161
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_07_HANDLER vector162
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_08_HANDLER vector163
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_09_HANDLER vector164
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_10_HANDLER vector165
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_11_HANDLER vector166
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_12_HANDLER vector167
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_13_HANDLER vector168
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_14_HANDLER vector169
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_15_HANDLER vector170
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER vector171
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER vector172
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#define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_NUMBER 152
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#define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_NUMBER 153
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_00_NUMBER 155
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_01_NUMBER 156
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_02_NUMBER 157
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_03_NUMBER 158
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_04_NUMBER 159
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_05_NUMBER 160
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_06_NUMBER 161
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_07_NUMBER 162
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_08_NUMBER 163
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_09_NUMBER 164
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_10_NUMBER 165
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_11_NUMBER 166
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_12_NUMBER 167
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_13_NUMBER 168
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_14_NUMBER 169
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_15_NUMBER 170
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_NUMBER 171
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#define SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_NUMBER 172
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#define SPC5_FLEXCAN0_ENABLE_CLOCK()
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#define SPC5_FLEXCAN0_DISABLE_CLOCK()
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#define SPC5_HAS_FLEXCAN1 TRUE
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#define SPC5_FLEXCAN1_MB 32
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#define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER vector173
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#define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER vector174
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER vector176
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_01_HANDLER vector177
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_02_HANDLER vector178
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_03_HANDLER vector179
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_04_HANDLER vector180
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_05_HANDLER vector181
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_06_HANDLER vector182
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_07_HANDLER vector183
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_08_HANDLER vector184
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_09_HANDLER vector185
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_10_HANDLER vector186
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_11_HANDLER vector187
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_12_HANDLER vector188
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_13_HANDLER vector189
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_14_HANDLER vector190
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_15_HANDLER vector191
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER vector192
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#define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_NUMBER 173
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#define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_NUMBER 174
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_00_NUMBER 176
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_01_NUMBER 177
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_02_NUMBER 178
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_03_NUMBER 179
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_04_NUMBER 180
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_05_NUMBER 181
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_06_NUMBER 182
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_07_NUMBER 183
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_08_NUMBER 184
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_09_NUMBER 185
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_10_NUMBER 186
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_11_NUMBER 187
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_12_NUMBER 188
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_13_NUMBER 189
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_14_NUMBER 190
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_15_NUMBER 191
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#define SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_NUMBER 192
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#define SPC5_FLEXCAN1_ENABLE_CLOCK()
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#define SPC5_FLEXCAN1_DISABLE_CLOCK()
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2012-12-17 11:02:50 +00:00
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/** @} */
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#endif /* _SPC563M_REGISTRY_H_ */
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/** @} */
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