2011-08-31 15:31:32 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2011-08-30 22:52:11 +00:00
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/**
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2011-09-25 10:56:39 +00:00
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* @file STM32/RTCv1/rtc_lld.c
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2011-08-30 22:52:11 +00:00
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* @brief STM32 RTC subsystem low level driver header.
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*
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* @addtogroup RTC
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_RTC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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2011-10-01 08:04:14 +00:00
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/**
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* @brief RTC driver identifier.
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*/
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RTCDriver RTCD1;
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2011-08-30 22:52:11 +00:00
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Shared IRQ handler.
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*
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* @param[in] rtcp pointer to a @p RTCDriver object
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2011-09-02 13:27:37 +00:00
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*
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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2011-10-01 08:04:14 +00:00
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static void rtc_lld_serve_interrupt(RTCDriver *rtcp) {
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2011-08-30 22:52:11 +00:00
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chSysLockFromIsr();
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2011-08-31 14:44:52 +00:00
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2011-10-01 08:04:14 +00:00
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if ((RTC->CRH & RTC_CRH_SECIE) && (RTC->CRL & RTC_CRL_SECF)) {
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rtcp->rtc_cb(rtcp, RTC_EVENT_SECOND);
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2011-12-16 14:42:23 +00:00
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RTC->CRL &= ~RTC_CRL_SECF;
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2011-08-30 22:52:11 +00:00
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}
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2011-10-01 08:04:14 +00:00
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if ((RTC->CRH & RTC_CRH_ALRIE) && (RTC->CRL & RTC_CRL_ALRF)) {
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2011-12-16 14:42:23 +00:00
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rtcp->rtc_cb(rtcp, RTC_EVENT_ALARM);
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RTC->CRL &= ~RTC_CRL_ALRF;
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2011-08-30 22:52:11 +00:00
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}
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2011-10-01 08:04:14 +00:00
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if ((RTC->CRH & RTC_CRH_OWIE) && (RTC->CRL & RTC_CRL_OWF)) {
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rtcp->rtc_cb(rtcp, RTC_EVENT_OVERFLOW);
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2011-12-16 14:42:23 +00:00
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RTC->CRL &= ~RTC_CRL_OWF;
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2011-08-30 22:52:11 +00:00
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}
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2011-08-31 14:44:52 +00:00
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2011-08-30 22:52:11 +00:00
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chSysUnlockFromIsr();
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}
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2011-10-01 08:04:14 +00:00
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/**
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* @brief Waits for the previous registers write to finish.
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*
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* @notapi
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*/
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static void rtc_lld_wait_write(void) {
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/* Waits registers write completion.*/
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while (!(RTC->CRL & RTC_CRL_RTOFF))
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;
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}
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2011-08-30 22:52:11 +00:00
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/**
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* @brief RTC interrupt handler.
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2011-10-01 08:04:14 +00:00
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*
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2011-08-30 22:52:11 +00:00
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* @isr
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*/
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CH_IRQ_HANDLER(RTC_IRQHandler) {
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2011-10-01 08:04:14 +00:00
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2011-08-30 22:52:11 +00:00
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CH_IRQ_PROLOGUE();
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2011-10-01 08:04:14 +00:00
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rtc_lld_serve_interrupt(&RTCD1);
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2011-08-30 22:52:11 +00:00
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CH_IRQ_EPILOGUE();
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}
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Enable access to registers and initialize RTC if BKP domain
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* was previously reseted.
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2011-09-21 17:42:30 +00:00
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* @note: Cold start time of LSE oscillator on STM32 platform
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* takes about 3 seconds.
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*
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2011-09-02 13:27:37 +00:00
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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void rtc_lld_init(void){
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2011-10-01 08:04:14 +00:00
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uint32_t preload;
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2011-09-19 15:02:02 +00:00
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2011-09-19 13:54:07 +00:00
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rccEnableBKPInterface(FALSE);
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2011-10-01 08:04:14 +00:00
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/* Enables access to BKP registers.*/
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2011-09-19 13:54:07 +00:00
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PWR->CR |= PWR_CR_DBP;
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2011-09-19 15:02:02 +00:00
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2011-10-01 08:04:14 +00:00
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/* If the RTC is not enabled then performs a reset of the backup domain.*/
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if (!(RCC->BDCR & RCC_BDCR_RTCEN)) {
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RCC->BDCR = RCC_BDCR_BDRST;
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RCC->BDCR = 0;
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}
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2011-09-20 07:02:14 +00:00
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2011-10-01 08:04:14 +00:00
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#if STM32_RTC == STM32_RTC_LSE
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2011-12-10 19:41:46 +00:00
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#define RTC_CLK STM32_LSECLK
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2011-10-01 08:04:14 +00:00
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if (!(RCC->BDCR & RCC_BDCR_LSEON)) {
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RCC->BDCR |= RCC_BDCR_LSEON;
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while (!(RCC->BDCR & RCC_BDCR_LSERDY))
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2011-08-30 22:52:11 +00:00
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;
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2011-10-01 08:04:14 +00:00
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}
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2011-12-16 14:42:23 +00:00
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preload = STM32_LSECLK - 1;
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2011-10-01 08:04:14 +00:00
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#elif STM32_RTC == STM32_RTC_LSI
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2011-12-10 19:41:46 +00:00
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#define RTC_CLK STM32_LSICLK
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2011-10-01 08:04:14 +00:00
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/* TODO: Move the LSI clock initialization in the HAL low level driver.*/
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RCC->CSR |= RCC_CSR_LSION;
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while (!(RCC->CSR & RCC_CSR_LSIRDY))
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;
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/* According to errata sheet we must wait additional 100 uS for
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stabilization.
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TODO: Change this code, software loops are not reliable.*/
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2011-12-10 19:41:46 +00:00
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volatile uint32_t tmo = (STM32_SYSCLK / 1000000) * 100;
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2011-10-01 08:04:14 +00:00
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while (tmo--)
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;
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2011-12-16 14:42:23 +00:00
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preload = STM32_LSICLK - 1;
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2011-09-20 07:02:14 +00:00
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#elif STM32_RTC == STM32_RTC_HSE
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2011-12-10 19:41:46 +00:00
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#define RTC_CLK (STM32_HSECLK / 128)
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2011-12-16 14:42:23 +00:00
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preload = (STM32_HSECLK / 128) - 1;
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2011-09-20 07:02:14 +00:00
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#endif
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2011-10-01 20:20:53 +00:00
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/* Selects clock source (previously enabled and stabilized).*/
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2011-10-01 08:04:14 +00:00
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RCC->BDCR = (RCC->BDCR & ~RCC_BDCR_RTCSEL) | STM32_RTC;
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/* RTC enabled regardless its previous status.*/
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RCC->BDCR |= RCC_BDCR_RTCEN;
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2011-09-20 07:02:14 +00:00
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/* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling
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2011-10-01 08:04:14 +00:00
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clocking on APB1, because these values only update when APB1
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functioning.*/
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RTC->CRL = 0;
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2011-09-20 07:02:14 +00:00
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while (!(RTC->CRL & RTC_CRL_RSF))
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;
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2011-10-01 08:04:14 +00:00
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/* Write preload register only if its value differs.*/
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if (preload != ((((uint32_t)(RTC->PRLH)) << 16) + (uint32_t)RTC->PRLL)) {
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2011-08-31 16:32:34 +00:00
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2011-10-01 08:04:14 +00:00
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rtc_lld_wait_write();
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2011-08-31 16:32:34 +00:00
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2011-10-01 08:04:14 +00:00
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/* Enters configuration mode and writes PRLx registers then leaves the
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configuration mode.*/
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RTC->CRL |= RTC_CRL_CNF;
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RTC->PRLH = (uint16_t)(preload >> 16);
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RTC->PRLL = (uint16_t)(preload & 0xFFFF);
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RTC->CRL &= ~RTC_CRL_CNF;
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2011-08-31 16:32:34 +00:00
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}
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2011-10-01 08:04:14 +00:00
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/* All interrupts initially disabled.*/
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RTC->CRH = 0;
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2011-08-31 14:44:52 +00:00
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2011-10-01 08:04:14 +00:00
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/* Callback initially disabled.*/
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RTCD1.rtc_cb = NULL;
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2011-08-30 22:52:11 +00:00
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}
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/**
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2011-10-01 08:04:14 +00:00
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* @brief Set current time.
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* @note Fractional part will be silently ignored. There is no possibility
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* to change it on STM32F1xx platform.
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2011-08-30 22:52:11 +00:00
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*
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2011-10-01 08:04:14 +00:00
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* @param[in] rtcp pointer to RTC driver structure
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* @param[in] timespec pointer to a @p RTCTime structure
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2011-09-02 13:27:37 +00:00
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*
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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2011-10-01 08:04:14 +00:00
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void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec) {
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2011-08-30 22:52:11 +00:00
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2011-10-01 08:04:14 +00:00
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(void)rtcp;
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2011-08-30 22:52:11 +00:00
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2011-10-01 08:04:14 +00:00
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rtc_lld_wait_write();
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2011-09-07 12:53:27 +00:00
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2011-10-01 08:04:14 +00:00
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RTC->CRL |= RTC_CRL_CNF;
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RTC->CNTH = (uint16_t)(timespec->tv_sec >> 16);
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RTC->CNTL = (uint16_t)(timespec->tv_sec & 0xFFFF);
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RTC->CRL &= ~RTC_CRL_CNF;
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2011-08-30 22:52:11 +00:00
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}
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/**
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2011-10-01 08:04:14 +00:00
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* @brief Get current time.
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2011-08-30 22:52:11 +00:00
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*
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2011-10-01 08:04:14 +00:00
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* @param[in] rtcp pointer to RTC driver structure
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2011-12-10 19:41:46 +00:00
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* @param[in] timespec pointer to a @p RTCTime structure
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2011-09-02 13:27:37 +00:00
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*
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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2011-10-01 08:04:14 +00:00
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void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) {
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(void)rtcp;
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2011-08-30 22:52:11 +00:00
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2011-12-10 19:41:46 +00:00
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uint32_t time_frac;
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READ_REGISTERS:
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timespec->tv_sec = ((uint32_t)(RTC->CNTH) << 16) + RTC->CNTL;
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2011-10-01 08:04:14 +00:00
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time_frac = (((uint32_t)RTC->DIVH) << 16) + (uint32_t)RTC->DIVL;
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2011-12-10 19:41:46 +00:00
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/* If second counter updated between reading of integer and fractional parts
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* we must reread both values. */
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if((timespec->tv_sec) != (((uint32_t)(RTC->CNTH) << 16) + RTC->CNTL)){
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goto READ_REGISTERS;
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}
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timespec->tv_msec = (uint16_t)(((RTC_CLK - 1 - time_frac) * 1000) / RTC_CLK);
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2011-08-30 22:52:11 +00:00
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}
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/**
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2011-10-01 08:04:14 +00:00
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* @brief Set alarm time.
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*
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* @note Default value after BKP domain reset is 0xFFFFFFFF
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2011-09-02 13:27:37 +00:00
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*
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2011-10-01 08:04:14 +00:00
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* @param[in] rtcp pointer to RTC driver structure
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* @param[in] alarm alarm identifier
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* @param[in] alarmspec pointer to a @p RTCAlarm structure
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2011-09-02 13:27:37 +00:00
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*
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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2011-10-01 08:04:14 +00:00
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void rtc_lld_set_alarm(RTCDriver *rtcp,
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rtcalarm_t alarm,
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const RTCAlarm *alarmspec) {
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2011-09-25 10:03:59 +00:00
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2011-10-01 08:04:14 +00:00
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(void)rtcp;
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(void)alarm;
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rtc_lld_wait_write();
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/* Enters configuration mode and writes ALRHx registers then leaves the
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configuration mode.*/
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RTC->CRL |= RTC_CRL_CNF;
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if (alarmspec != NULL) {
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RTC->ALRH = (uint16_t)(alarmspec->tv_sec >> 16);
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RTC->ALRL = (uint16_t)(alarmspec->tv_sec & 0xFFFF);
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}
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else {
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RTC->ALRH = 0;
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RTC->ALRL = 0;
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}
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RTC->CRL &= ~RTC_CRL_CNF;
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2011-08-30 22:52:11 +00:00
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}
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/**
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2011-10-01 08:04:14 +00:00
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* @brief Get current alarm.
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* @note If an alarm has not been set then the returned alarm specification
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* is not meaningful.
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2011-09-25 10:03:59 +00:00
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*
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2011-10-01 08:04:14 +00:00
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* @note Default value after BKP domain reset is 0xFFFFFFFF.
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2011-09-25 10:03:59 +00:00
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*
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2011-12-16 14:42:23 +00:00
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* @param[in] rtcp pointer to RTC driver structure
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* @param[in] alarm alarm identifier
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2011-10-01 08:04:14 +00:00
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* @param[out] alarmspec pointer to a @p RTCAlarm structure
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2011-09-02 13:27:37 +00:00
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*
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* @notapi
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2011-08-30 22:52:11 +00:00
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*/
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2011-10-01 08:04:14 +00:00
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void rtc_lld_get_alarm(RTCDriver *rtcp,
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rtcalarm_t alarm,
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RTCAlarm *alarmspec) {
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2011-08-30 22:52:11 +00:00
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2011-10-01 08:04:14 +00:00
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(void)rtcp;
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(void)alarm;
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2011-09-01 18:09:40 +00:00
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2011-10-01 08:04:14 +00:00
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alarmspec->tv_sec = ((RTC->ALRH << 16) + RTC->ALRL);
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2011-08-30 22:52:11 +00:00
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}
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|
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/**
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2011-10-01 08:04:14 +00:00
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* @brief Enables or disables RTC callbacks.
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* @details This function enables or disables callbacks, use a @p NULL pointer
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* in order to disable a callback.
|
2011-09-25 10:03:59 +00:00
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|
*
|
2011-10-01 08:04:14 +00:00
|
|
|
* @param[in] rtcp pointer to RTC driver structure
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|
|
|
* @param[in] callback callback function pointer or @p NULL
|
2011-09-02 13:27:37 +00:00
|
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|
*
|
|
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* @notapi
|
2011-08-30 22:52:11 +00:00
|
|
|
*/
|
2011-12-16 14:42:23 +00:00
|
|
|
void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
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|
|
|
|
|
|
|
if (callback != NULL) {
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|
|
rtcp->rtc_cb = callback;
|
2011-08-30 22:52:11 +00:00
|
|
|
|
2011-10-01 08:04:14 +00:00
|
|
|
/* Interrupts are enabled only after setting up the callback, this
|
2011-12-16 14:42:23 +00:00
|
|
|
way there is no need to check for the NULL callback pointer inside
|
|
|
|
the IRQ handler.*/
|
2011-12-12 13:13:07 +00:00
|
|
|
rtc_lld_wait_write();
|
2011-10-01 08:04:14 +00:00
|
|
|
RTC->CRL &= ~(RTC_CRL_OWF | RTC_CRL_ALRF | RTC_CRL_SECF);
|
2011-12-12 13:13:07 +00:00
|
|
|
rtc_lld_wait_write();
|
2011-12-21 18:49:04 +00:00
|
|
|
nvicEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));
|
2011-10-01 08:04:14 +00:00
|
|
|
RTC->CRH |= RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE;
|
|
|
|
}
|
|
|
|
else {
|
2011-12-21 18:49:04 +00:00
|
|
|
nvicDisableVector(RTC_IRQn);
|
2011-12-12 13:13:07 +00:00
|
|
|
rtc_lld_wait_write();
|
2011-10-01 08:04:14 +00:00
|
|
|
RTC->CRL = 0;
|
|
|
|
RTC->CRH = 0;
|
|
|
|
}
|
|
|
|
}
|
2011-08-30 22:52:11 +00:00
|
|
|
|
|
|
|
#endif /* HAL_USE_RTC */
|
|
|
|
|
|
|
|
/** @} */
|