164 lines
6.0 KiB
C
164 lines
6.0 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/uart_lld.h
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* @brief STM32 low level UART driver header.
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*
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* @addtogroup STM32_UART
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* @{
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*/
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#ifndef _UART_LLD_H_
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#define _UART_LLD_H_
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#if CH_HAL_USE_UART || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief UART driver on USART1 enable switch.
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* @details If set to @p TRUE the support for USART1 is included.
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* @note The default is @p FALSE.
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*/
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#if !defined(STM32_UART_USE_USART1) || defined(__DOXYGEN__)
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#define STM32_UART_USE_USART1 TRUE
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#endif
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/**
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* @brief USART1 interrupt priority level setting.
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*/
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#if !defined(STM32_UART_USART1_IRQ_PRIO) || defined(__DOXYGEN__)
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#endif
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/**
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* @brief USART1 DMA priority (0..3|lowest..highest).
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* @note The priority level is used for both the TX and RX DMA channels but
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* because of the channels ordering the RX channel has always priority
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* over the TX channel.
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*/
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#if !defined(STM32_UART_USART1_DMA_PRIO) || defined(__DOXYGEN__)
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#define STM32_UART_USART1_DMA_PRIORITY 1
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief UART driver condition flags type.
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*/
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typedef uint32_t uartflags_t;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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/** @brief End of transmission buffer callback.*/
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uartcb_t uc_txend1;
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/** @brief Physical end of transmission callback.*/
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uartcb_t uc_txend2;
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/** @brief Receive buffer filled callback.*/
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uartcb_t uc_rxend;
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/** @brief Character received while out if the @p UART_RECEIVE state.*/
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uartcb_t uc_rxchar;
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/** @brief Receive error callback.*/
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uartcb_t uc_rxerr;
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/* End of the mandatory fields.*/
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/** @brief Bit rate.*/
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uint32_t uc_speed;
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/** @brief Initialization value for the CR1 register.*/
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uint16_t uc_cr1;
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/** @brief Initialization value for the CR2 register.*/
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uint16_t uc_cr2;
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/** @brief Initialization value for the CR3 register.*/
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uint16_t uc_cr3;
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} UARTConfig;
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/**
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* @brief Structure representing an UART driver.
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*/
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typedef struct {
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/** @brief Driver state.*/
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uartstate_t ud_state;
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/** @brief Current configuration data.*/
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const UARTConfig *ud_config;
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/** @brief Transmitter state.*/
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uarttxstate_t ud_txstate;
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/** @brief Receiver state.*/
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uartrxstate_t ud_rxstate;
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/** @brief UART driver status flags.*/
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uartflags_t ud_flags;
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/* End of the mandatory fields.*/
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/** @brief Default receive buffer while into @p UART_RX_IDLE state.*/
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uint16_t ud_rxbuf;
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/** @brief Pointer to the USART registers block.*/
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USART_TypeDef *ud_usart;
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/** @brief Pointer to the receive DMA channel registers block.*/
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DMA_Channel_TypeDef *ud_dmarx;
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/** @brief Receive DMA flags mask*/
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uint32_t ud_dmarmsk;
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/** @brief Pointer to the transmit DMA channel registers block.*/
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DMA_Channel_TypeDef *ud_dmatx;
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/** @brief Transmit DMA flags mask*/
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uint32_t ud_dmatmsk;
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/** @brief DMA priority bit mask.*/
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uint32_t ud_dmaccr;
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} UARTDriver;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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void uart_lld_init(void);
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void uart_lld_start(UARTDriver *uartp);
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void uart_lld_stop(UARTDriver *uartp);
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void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf);
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void uart_lld_stop_send(UARTDriver *uartp);
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void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf);
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void uart_lld_stop_receive(UARTDriver *uartp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* CH_HAL_USE_UART */
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#endif /* _UART_LLD_H_ */
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/** @} */
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