2012-06-17 11:40:31 +00:00
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/*
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2013-10-20 10:49:37 +00:00
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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2012-06-17 11:40:31 +00:00
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2013-10-20 10:49:37 +00:00
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This file is part of ChibiOS/RT.
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2012-06-17 11:40:31 +00:00
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2013-10-20 10:49:37 +00:00
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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2012-06-17 11:40:31 +00:00
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2013-10-20 10:49:37 +00:00
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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2012-06-17 11:40:31 +00:00
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*/
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#include "ch.h"
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#include "hal.h"
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2012-07-18 16:19:35 +00:00
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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2012-06-17 11:40:31 +00:00
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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const PALConfig pal_default_config =
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{
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2012-07-18 16:19:35 +00:00
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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2012-06-17 11:40:31 +00:00
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};
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#endif
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2012-07-18 16:19:35 +00:00
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/**
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* @brief Early initialization code.
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* @details This initialization must be performed just after stack setup
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* and before any other initialization.
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2012-06-17 11:40:31 +00:00
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*/
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void __early_init(void) {
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stm32_clock_init();
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}
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2012-07-18 16:19:35 +00:00
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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/**
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* @brief SDC card detection.
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2012-06-28 13:54:19 +00:00
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*/
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bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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2013-10-20 10:49:37 +00:00
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static bool_t last_status = FALSE;
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if (blkIsTransferring(sdcp))
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return last_status;
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2012-06-30 14:41:51 +00:00
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return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
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2012-06-28 13:54:19 +00:00
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}
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2012-07-18 16:19:35 +00:00
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/**
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* @brief SDC card write protection detection.
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2012-06-28 13:54:19 +00:00
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*/
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bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
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2013-10-20 10:49:37 +00:00
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(void)sdcp;
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2012-06-28 13:54:19 +00:00
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return FALSE;
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}
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#endif /* HAL_USE_SDC */
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2012-07-18 16:19:35 +00:00
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#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
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/**
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* @brief MMC_SPI card detection.
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*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return TRUE;
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}
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/**
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* @brief MMC_SPI card write protection detection.
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*/
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return FALSE;
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}
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#endif
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/**
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* @brief Board-specific initialization code.
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* @todo Add your board-specific code, if any.
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2012-06-17 11:40:31 +00:00
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*/
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void boardInit(void) {
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}
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