507 lines
15 KiB
C
507 lines
15 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/gpt_lld.h
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* @brief STM32 GPT subsystem low level driver header.
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*
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* @addtogroup GPT
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* @{
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*/
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#ifndef _GPT_LLD_H_
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#define _GPT_LLD_H_
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#include "stm32_tim.h"
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#if HAL_USE_GPT || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief GPTD1 driver enable switch.
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* @details If set to @p TRUE the support for GPTD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM1) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM1 FALSE
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#endif
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/**
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* @brief GPTD2 driver enable switch.
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* @details If set to @p TRUE the support for GPTD2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM2) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM2 FALSE
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#endif
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/**
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* @brief GPTD3 driver enable switch.
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* @details If set to @p TRUE the support for GPTD3 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM3) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM3 FALSE
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#endif
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/**
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* @brief GPTD4 driver enable switch.
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* @details If set to @p TRUE the support for GPTD4 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM4) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM4 FALSE
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#endif
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/**
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* @brief GPTD5 driver enable switch.
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* @details If set to @p TRUE the support for GPTD5 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM5) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM5 FALSE
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#endif
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/**
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* @brief GPTD6 driver enable switch.
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* @details If set to @p TRUE the support for GPTD6 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM6) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM6 FALSE
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#endif
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/**
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* @brief GPTD7 driver enable switch.
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* @details If set to @p TRUE the support for GPTD7 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM7) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM7 FALSE
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#endif
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/**
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* @brief GPTD8 driver enable switch.
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* @details If set to @p TRUE the support for GPTD8 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM8) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM8 FALSE
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#endif
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/**
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* @brief GPTD9 driver enable switch.
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* @details If set to @p TRUE the support for GPTD9 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM9) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM9 FALSE
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#endif
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/**
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* @brief GPTD11 driver enable switch.
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* @details If set to @p TRUE the support for GPTD11 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM11) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM11 FALSE
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#endif
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/**
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* @brief GPTD12 driver enable switch.
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* @details If set to @p TRUE the support for GPTD12 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM12) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM12 FALSE
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#endif
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/**
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* @brief GPTD14 driver enable switch.
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* @details If set to @p TRUE the support for GPTD14 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_GPT_USE_TIM14) || defined(__DOXYGEN__)
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#define STM32_GPT_USE_TIM14 FALSE
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#endif
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/**
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* @brief GPTD1 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD2 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD3 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD4 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD5 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM5_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD6 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM6_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM6_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD7 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM7_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM7_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD8 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM8_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD9 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM9_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD11 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM11_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM11_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD12 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM12_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM12_IRQ_PRIORITY 7
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#endif
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/**
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* @brief GPTD14 interrupt priority level setting.
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*/
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#if !defined(STM32_GPT_TIM14_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_GPT_TIM14_IRQ_PRIORITY 7
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if STM32_GPT_USE_TIM1 && !STM32_HAS_TIM1
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#error "TIM1 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM2 && !STM32_HAS_TIM2
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#error "TIM2 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM3 && !STM32_HAS_TIM3
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#error "TIM3 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM4 && !STM32_HAS_TIM4
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#error "TIM4 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM5 && !STM32_HAS_TIM5
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#error "TIM5 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM6 && !STM32_HAS_TIM6
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#error "TIM6 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM7 && !STM32_HAS_TIM7
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#error "TIM7 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM8 && !STM32_HAS_TIM8
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#error "TIM8 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM9 && !STM32_HAS_TIM9
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#error "TIM9 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM11 && !STM32_HAS_TIM11
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#error "TIM11 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM12 && !STM32_HAS_TIM12
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#error "TIM12 not present in the selected device"
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#endif
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#if STM32_GPT_USE_TIM14 && !STM32_HAS_TIM14
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#error "TIM14 not present in the selected device"
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#endif
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#if !STM32_GPT_USE_TIM1 && !STM32_GPT_USE_TIM2 && \
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!STM32_GPT_USE_TIM3 && !STM32_GPT_USE_TIM4 && \
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!STM32_GPT_USE_TIM5 && !STM32_GPT_USE_TIM6 && \
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!STM32_GPT_USE_TIM7 && !STM32_GPT_USE_TIM8 && \
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!STM32_GPT_USE_TIM9 && !STM32_GPT_USE_TIM11 && \
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!STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14
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#error "GPT driver activated but no TIM peripheral assigned"
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#endif
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#if STM32_GPT_USE_TIM1 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM1"
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#endif
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#if STM32_GPT_USE_TIM2 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM2_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM2"
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#endif
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#if STM32_GPT_USE_TIM3 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM3_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM3"
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#endif
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#if STM32_GPT_USE_TIM4 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM4_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM4"
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#endif
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#if STM32_GPT_USE_TIM5 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM5_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM5"
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#endif
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#if STM32_GPT_USE_TIM6 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM6_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM6"
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#endif
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#if STM32_GPT_USE_TIM7 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM7_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM7"
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#endif
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#if STM32_GPT_USE_TIM8 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM8_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM8"
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#endif
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#if STM32_GPT_USE_TIM9 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM9_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM9"
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#endif
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#if STM32_GPT_USE_TIM11 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM11_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM11"
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#endif
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#if STM32_GPT_USE_TIM12 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM12_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM12"
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#endif
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#if STM32_GPT_USE_TIM14 && \
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!CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM14_IRQ_PRIORITY)
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#error "Invalid IRQ priority assigned to TIM14"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
|
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||
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/**
|
||
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* @brief GPT frequency type.
|
||
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|
*/
|
||
|
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typedef uint32_t gptfreq_t;
|
||
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|
||
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/**
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||
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* @brief GPT counter type.
|
||
|
|
*/
|
||
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|
typedef uint16_t gptcnt_t;
|
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||
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/**
|
||
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|
* @brief Driver configuration structure.
|
||
|
|
* @note It could be empty on some architectures.
|
||
|
|
*/
|
||
|
|
typedef struct {
|
||
|
|
/**
|
||
|
|
* @brief Timer clock in Hz.
|
||
|
|
* @note The low level can use assertions in order to catch invalid
|
||
|
|
* frequency specifications.
|
||
|
|
*/
|
||
|
|
gptfreq_t frequency;
|
||
|
|
/**
|
||
|
|
* @brief Timer callback pointer.
|
||
|
|
* @note This callback is invoked on GPT counter events.
|
||
|
|
*/
|
||
|
|
gptcallback_t callback;
|
||
|
|
/* End of the mandatory fields.*/
|
||
|
|
} GPTConfig;
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Structure representing a GPT driver.
|
||
|
|
*/
|
||
|
|
struct GPTDriver {
|
||
|
|
/**
|
||
|
|
* @brief Driver state.
|
||
|
|
*/
|
||
|
|
gptstate_t state;
|
||
|
|
/**
|
||
|
|
* @brief Current configuration data.
|
||
|
|
*/
|
||
|
|
const GPTConfig *config;
|
||
|
|
#if defined(GPT_DRIVER_EXT_FIELDS)
|
||
|
|
GPT_DRIVER_EXT_FIELDS
|
||
|
|
#endif
|
||
|
|
/* End of the mandatory fields.*/
|
||
|
|
/**
|
||
|
|
* @brief Timer base clock.
|
||
|
|
*/
|
||
|
|
uint32_t clock;
|
||
|
|
/**
|
||
|
|
* @brief Pointer to the TIMx registers block.
|
||
|
|
*/
|
||
|
|
stm32_tim_t *tim;
|
||
|
|
};
|
||
|
|
|
||
|
|
/*===========================================================================*/
|
||
|
|
/* Driver macros. */
|
||
|
|
/*===========================================================================*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Changes the interval of GPT peripheral.
|
||
|
|
* @details This function changes the interval of a running GPT unit.
|
||
|
|
* @pre The GPT unit must have been activated using @p gptStart().
|
||
|
|
* @pre The GPT unit must have been running in continuous mode using
|
||
|
|
* @p gptStartContinuous().
|
||
|
|
* @post The GPT unit interval is changed to the new value.
|
||
|
|
* @note The function has effect at the next cycle start.
|
||
|
|
*
|
||
|
|
* @param[in] gptp pointer to a @p GPTDriver object
|
||
|
|
* @param[in] interval new cycle time in timer ticks
|
||
|
|
* @notapi
|
||
|
|
*/
|
||
|
|
#define gpt_lld_change_interval(gptp, interval) \
|
||
|
|
((gptp)->tim->ARR = (uint16_t)((interval) - 1))
|
||
|
|
|
||
|
|
/*===========================================================================*/
|
||
|
|
/* External declarations. */
|
||
|
|
/*===========================================================================*/
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM1 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD1;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM2 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD2;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM3 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD3;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM4 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD4;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM5 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD5;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM6 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD6;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM7 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD7;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM8 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD8;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM9 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD9;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM11 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD11;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM12 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD12;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if STM32_GPT_USE_TIM14 && !defined(__DOXYGEN__)
|
||
|
|
extern GPTDriver GPTD14;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
extern "C" {
|
||
|
|
#endif
|
||
|
|
void gpt_lld_init(void);
|
||
|
|
void gpt_lld_start(GPTDriver *gptp);
|
||
|
|
void gpt_lld_stop(GPTDriver *gptp);
|
||
|
|
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period);
|
||
|
|
void gpt_lld_stop_timer(GPTDriver *gptp);
|
||
|
|
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval);
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* HAL_USE_GPT */
|
||
|
|
|
||
|
|
#endif /* _GPT_LLD_H_ */
|
||
|
|
|
||
|
|
/** @} */
|