2008-02-06 14:41:28 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _CHCORE_H_
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#define _CHCORE_H_
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2008-11-29 13:57:06 +00:00
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/*
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2008-11-29 10:54:24 +00:00
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* Macro defining the ARM7 architecture.
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*/
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2008-05-07 13:08:43 +00:00
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#define CH_ARCHITECTURE_ARM7
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2008-11-29 10:54:24 +00:00
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/*
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* 32 bit stack alignment.
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*/
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typedef uint32_t stkalign_t;
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2008-11-29 12:15:17 +00:00
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/*
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* Generic ARM register.
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*/
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typedef void *regarm_t;
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2008-02-06 14:41:28 +00:00
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/*
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* Interrupt saved context.
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*/
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struct extctx {
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2008-11-29 12:15:17 +00:00
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regarm_t spsr_irq;
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regarm_t lr_irq;
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regarm_t r0;
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regarm_t r1;
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regarm_t r2;
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regarm_t r3;
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regarm_t r12;
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regarm_t lr_usr;
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2008-02-06 14:41:28 +00:00
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};
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/*
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* System saved context.
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*/
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struct intctx {
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2008-11-29 12:15:17 +00:00
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regarm_t r4;
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regarm_t r5;
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regarm_t r6;
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2008-02-06 14:41:28 +00:00
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#ifndef CH_CURRP_REGISTER_CACHE
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2008-11-29 12:15:17 +00:00
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regarm_t r7;
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2008-02-06 14:41:28 +00:00
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#endif
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2008-11-29 12:15:17 +00:00
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regarm_t r8;
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regarm_t r9;
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regarm_t r10;
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regarm_t r11;
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regarm_t lr;
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2008-02-06 14:41:28 +00:00
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};
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/*
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* Port dependent part of the Thread structure, you may add fields in
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* this structure.
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*/
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typedef struct {
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struct intctx *r13;
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} Context;
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/*
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* Platform dependent part of the \p chThdCreate() API.
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*/
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#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
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2008-03-03 15:52:55 +00:00
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tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
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2008-02-06 14:41:28 +00:00
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wsize - \
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sizeof(struct intctx)); \
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tp->p_ctx.r13->r4 = pf; \
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tp->p_ctx.r13->r5 = arg; \
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tp->p_ctx.r13->lr = threadstart; \
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}
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#ifdef THUMB
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2008-03-27 14:42:48 +00:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2008-08-25 13:00:11 +00:00
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uint32_t _lock(void);
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void _unlock(uint32_t);
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void _enable(void);
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2008-03-27 14:42:48 +00:00
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#ifdef __cplusplus
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}
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#endif
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2008-08-25 13:00:11 +00:00
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#ifdef REENTRANT_LOCKS
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#define chSysLock() uint32_t ps = _lock()
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#define chSysUnlock() _unlock(ps)
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#else
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#define chSysLock() _lock()
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#define chSysUnlock() _enable()
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#endif /* !REENTRANT_LOCKS */
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#define chSysEnable() _enable()
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2008-02-06 14:41:28 +00:00
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#else /* !THUMB */
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2008-08-25 13:00:11 +00:00
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#ifdef REENTRANT_LOCKS
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#define chSysLock() \
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uint32_t ps; \
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asm volatile ("mrs %0, CPSR" : "=r" (ps) : ); \
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asm volatile ("msr CPSR_c, #0x9F");
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#define chSysUnlock() asm volatile ("msr CPSR_c, %0" : : "r" (ps))
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#define chSysEnable() asm volatile ("msr CPSR_c, #0x1F")
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#else
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2008-09-05 08:56:49 +00:00
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#define chSysLock() asm volatile ("msr CPSR_c, #0x9F")
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2008-08-25 13:00:11 +00:00
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#define chSysUnlock() asm volatile ("msr CPSR_c, #0x1F")
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#define chSysEnable() asm volatile ("msr CPSR_c, #0x1F")
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#endif /* !REENTRANT_LOCKS */
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2008-02-06 14:41:28 +00:00
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#endif /* THUMB */
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2008-12-29 10:55:24 +00:00
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#ifndef INT_REQUIRED_STACK
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2008-02-06 14:41:28 +00:00
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#ifdef THUMB
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#define INT_REQUIRED_STACK 0x10
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#else /* !THUMB */
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2008-12-29 10:55:24 +00:00
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#define INT_REQUIRED_STACK 0x10
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2008-02-06 14:41:28 +00:00
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#endif /* !THUMB */
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2008-12-29 10:55:24 +00:00
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#endif
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2008-11-29 10:54:24 +00:00
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#define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1)
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#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
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sizeof(struct intctx) + \
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sizeof(struct extctx) + \
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(n) + \
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INT_REQUIRED_STACK)
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2008-11-29 12:56:26 +00:00
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#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
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2008-02-06 14:41:28 +00:00
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#ifdef THUMB
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2008-02-25 16:29:25 +00:00
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#define chSysSwitchI chSysSwitchI_thumb
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2008-02-06 14:41:28 +00:00
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#define chSysIRQEnterI() { \
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asm(".code 32 \n\t" \
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"stmfd sp!, {r0-r3, r12, lr} \n\t" \
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"add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t"); \
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}
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#define chSysIRQExitI() { \
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asm("ldr r0, =IrqCommon \n\t" \
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"bx r0 \n\t"); \
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}
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#else /* !THUMB */
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2008-02-25 16:29:25 +00:00
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#define chSysSwitchI chSysSwitchI_arm
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2008-02-06 14:41:28 +00:00
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#define chSysIRQEnterI() { \
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asm("stmfd sp!, {r0-r3, r12, lr} \n\t"); \
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}
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#define chSysIRQExitI() { \
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asm("b IrqCommon \n\t"); \
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}
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#endif /* !THUMB */
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/* It requires zero bytes, but better be safe.*/
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#define IDLE_THREAD_STACK_SIZE 8
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2008-03-27 14:42:48 +00:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2008-11-29 10:54:24 +00:00
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void _idle(void *p) __attribute__((weak, noreturn));
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2008-03-27 14:42:48 +00:00
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void chSysHalt(void);
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void chSysSwitchI(Thread *otp, Thread *ntp);
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void chSysPuts(char *msg);
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void threadstart(void);
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#ifdef __cplusplus
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}
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#endif
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2008-02-06 14:41:28 +00:00
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#endif /* _CHCORE_H_ */
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