114 lines
3.2 KiB
C
114 lines
3.2 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
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#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
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(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
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{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
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#endif
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};
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#endif
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/*
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* SYS IRQ handling here.
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*/
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static CH_IRQ_HANDLER(SYSIrqHandler) {
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CH_IRQ_PROLOGUE();
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if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
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(void) AT91C_BASE_PITC->PITC_PIVR;
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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}
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#if USE_SAM7_DBGU_UART
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if (AT91C_BASE_DBGU->DBGU_CSR &
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(AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
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sd_lld_serve_interrupt(&SDDBG);
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}
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#endif
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AT91C_BASE_AIC->AIC_EOICR = 0;
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CH_IRQ_EPILOGUE();
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}
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/*
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* Early initialization code.
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* This initialization must be performed just after stack setup and before
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* any other initialization.
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*/
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void __early_init(void) {
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/* Watchdog disabled.*/
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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at91sam7_clock_init();
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}
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#if HAL_USE_MMC_SPI
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/* Board-related functions related to the MMC_SPI driver.*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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return !palReadPad(IOPORT2, PIOB_MMC_CP);
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}
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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return palReadPad(IOPORT2, PIOB_MMC_WP);
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}
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#endif
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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/*
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* PIT Initialization.
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*/
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AIC_ConfigureIT(AT91C_ID_SYS,
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AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
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SYSIrqHandler);
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AIC_EnableIT(AT91C_ID_SYS);
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AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
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AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
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/*
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* RTS/CTS pins enabled for USART0 only.
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*/
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
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AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
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}
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