2010-01-02 13:35:55 +00:00
|
|
|
/*
|
2010-02-21 07:24:53 +00:00
|
|
|
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
|
2010-01-02 13:35:55 +00:00
|
|
|
|
|
|
|
This file is part of ChibiOS/RT.
|
|
|
|
|
|
|
|
ChibiOS/RT is free software; you can redistribute it and/or modify
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
ChibiOS/RT is distributed in the hope that it will be useful,
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* STM32 drivers configuration.
|
|
|
|
* The following settings override the default settings present in
|
|
|
|
* the various device driver implementation headers.
|
|
|
|
* Note that the settings for each driver only have effect if the driver
|
|
|
|
* is enabled in halconf.h.
|
|
|
|
*
|
|
|
|
* IRQ priorities:
|
2010-03-22 13:39:26 +00:00
|
|
|
* 15 Lowest, priority level reserved for PENDSV.
|
|
|
|
* 14...4 Normal IRQs priority levels (0x80 used by SYSTICK).
|
|
|
|
* 3 Used by SVCALL, do not share.
|
|
|
|
* 2...0 Fast interrupts, can preempt the kernel but cannot use it
|
|
|
|
* directly.
|
2010-01-02 13:35:55 +00:00
|
|
|
*
|
|
|
|
* DMA priorities:
|
2010-02-21 07:24:53 +00:00
|
|
|
* 0...3 Lowest...Highest.
|
2010-01-02 13:35:55 +00:00
|
|
|
*/
|
|
|
|
|
2010-03-22 13:39:26 +00:00
|
|
|
/*
|
|
|
|
* HAL driver system settings.
|
|
|
|
*/
|
|
|
|
#define STM32_SYSCLK 72
|
|
|
|
|
2010-01-02 13:35:55 +00:00
|
|
|
/*
|
2010-02-21 07:24:53 +00:00
|
|
|
* ADC driver system settings.
|
2010-01-02 13:35:55 +00:00
|
|
|
*/
|
|
|
|
#define USE_STM32_ADC1 TRUE
|
|
|
|
#define STM32_ADC1_DMA_PRIORITY 3
|
2010-03-22 13:39:26 +00:00
|
|
|
#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5)
|
2010-01-02 13:35:55 +00:00
|
|
|
#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
|
|
|
|
|
|
|
|
/*
|
|
|
|
* CAN driver system settings.
|
|
|
|
*/
|
|
|
|
#define USE_STM32_CAN1 TRUE
|
2010-03-22 13:39:26 +00:00
|
|
|
#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11)
|
2010-01-02 13:35:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* PWM driver system settings.
|
|
|
|
*/
|
|
|
|
#define USE_STM32_PWM1 TRUE
|
|
|
|
#define USE_STM32_PWM2 FALSE
|
|
|
|
#define USE_STM32_PWM3 FALSE
|
|
|
|
#define USE_STM32_PWM4 FALSE
|
2010-03-22 13:39:26 +00:00
|
|
|
#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7)
|
|
|
|
#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7)
|
|
|
|
#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7)
|
|
|
|
#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7)
|
2010-01-02 13:35:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* SERIAL driver system settings.
|
|
|
|
*/
|
|
|
|
#define USE_STM32_USART1 FALSE
|
|
|
|
#define USE_STM32_USART2 TRUE
|
|
|
|
#define USE_STM32_USART3 FALSE
|
2010-03-22 13:39:26 +00:00
|
|
|
#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
|
|
|
|
#define USE_STM32_UART4 FALSE
|
|
|
|
#define USE_STM32_UART5 FALSE
|
|
|
|
#endif
|
|
|
|
#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12)
|
|
|
|
#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12)
|
|
|
|
#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12)
|
|
|
|
#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
|
|
|
|
#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12)
|
|
|
|
#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12)
|
|
|
|
#endif
|
2010-01-02 13:35:55 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* SPI driver system settings.
|
|
|
|
*/
|
|
|
|
#define USE_STM32_SPI1 TRUE
|
|
|
|
#define USE_STM32_SPI2 TRUE
|
|
|
|
#define STM32_SPI1_DMA_PRIORITY 2
|
|
|
|
#define STM32_SPI2_DMA_PRIORITY 2
|
2010-03-22 13:39:26 +00:00
|
|
|
#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10)
|
|
|
|
#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10)
|
2010-01-02 13:35:55 +00:00
|
|
|
#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
|