2011-04-23 12:23:44 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2012-01-21 14:29:42 +00:00
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2011,2012 Giovanni Di Sirio.
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2011-04-23 12:23:44 +00:00
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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2012-01-12 22:08:04 +00:00
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* STM32F1xx drivers configuration.
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2011-04-23 12:23:44 +00:00
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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/*
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* HAL driver system settings.
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*/
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2012-01-08 11:38:57 +00:00
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#define STM32_NO_INIT FALSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_LSE_ENABLED FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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2012-01-08 11:38:57 +00:00
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#define STM32_USB_CLOCK_REQUIRED TRUE
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2011-04-23 12:23:44 +00:00
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#define STM32_USBPRE STM32_USBPRE_DIV1P5
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2012-01-08 11:38:57 +00:00
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
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2012-01-04 22:00:44 +00:00
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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2011-04-23 12:23:44 +00:00
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_USE_ADC1 TRUE
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2011-05-22 09:45:47 +00:00
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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2011-04-23 12:23:44 +00:00
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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/*
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* CAN driver system settings.
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*/
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#define STM32_CAN_USE_CAN1 TRUE
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#define STM32_CAN_CAN1_IRQ_PRIORITY 11
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2011-09-12 19:15:30 +00:00
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/*
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* EXT driver system settings.
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*/
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#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
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2011-04-23 12:23:44 +00:00
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 FALSE
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#define STM32_GPT_USE_TIM2 FALSE
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#define STM32_GPT_USE_TIM3 FALSE
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#define STM32_GPT_USE_TIM4 FALSE
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#define STM32_GPT_USE_TIM5 FALSE
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2011-06-29 11:59:15 +00:00
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#define STM32_GPT_USE_TIM8 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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2011-06-29 11:59:15 +00:00
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#define STM32_GPT_TIM8_IRQ_PRIORITY 7
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2011-04-23 12:23:44 +00:00
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2012-01-12 22:08:04 +00:00
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_USE_I2C1 FALSE
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#define STM32_I2C_USE_I2C2 FALSE
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#define STM32_I2C_USE_I2C3 FALSE
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#define STM32_I2C_I2C1_IRQ_PRIORITY 10
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#define STM32_I2C_I2C2_IRQ_PRIORITY 10
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#define STM32_I2C_I2C3_IRQ_PRIORITY 10
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#define STM32_I2C_I2C1_DMA_PRIORITY 1
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#define STM32_I2C_I2C2_DMA_PRIORITY 1
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#define STM32_I2C_I2C3_DMA_PRIORITY 1
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#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()
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2011-04-23 12:23:44 +00:00
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_USE_TIM1 FALSE
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#define STM32_ICU_USE_TIM2 FALSE
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#define STM32_ICU_USE_TIM3 FALSE
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2012-01-12 22:08:04 +00:00
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#define STM32_ICU_USE_TIM4 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_ICU_USE_TIM5 FALSE
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2011-06-29 11:59:15 +00:00
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#define STM32_ICU_USE_TIM8 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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2011-06-29 11:59:15 +00:00
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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2011-04-23 12:23:44 +00:00
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/*
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* PWM driver system settings.
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*/
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2012-01-12 22:08:04 +00:00
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#define STM32_PWM_USE_ADVANCED FALSE
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#define STM32_PWM_USE_TIM1 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM4 FALSE
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#define STM32_PWM_USE_TIM5 FALSE
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2011-06-29 11:59:15 +00:00
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#define STM32_PWM_USE_TIM8 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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2011-06-29 11:59:15 +00:00
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#define STM32_PWM_TIM8_IRQ_PRIORITY 7
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2011-04-23 12:23:44 +00:00
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2011-05-14 05:27:09 +00:00
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/*
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2012-01-12 22:08:04 +00:00
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* RTC driver system settings.
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2011-05-14 05:27:09 +00:00
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*/
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2012-01-12 22:08:04 +00:00
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#define STM32_RTC_IRQ_PRIORITY 15
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2011-05-14 05:27:09 +00:00
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2011-04-23 12:23:44 +00:00
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USE_USART1 TRUE
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2011-06-05 08:39:49 +00:00
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#define STM32_SERIAL_USE_USART2 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_SERIAL_USE_USART3 FALSE
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#define STM32_SERIAL_USE_UART4 FALSE
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#define STM32_SERIAL_USE_UART5 FALSE
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2011-11-10 20:27:29 +00:00
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#define STM32_SERIAL_USE_USART6 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART3_PRIORITY 12
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#define STM32_SERIAL_UART4_PRIORITY 12
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#define STM32_SERIAL_UART5_PRIORITY 12
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2011-11-10 20:27:29 +00:00
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#define STM32_SERIAL_USART6_PRIORITY 12
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2011-04-23 12:23:44 +00:00
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/*
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* SPI driver system settings.
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*/
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2012-01-12 22:08:04 +00:00
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_SPI_USE_SPI3 FALSE
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2011-05-22 09:45:47 +00:00
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#define STM32_SPI_SPI3_DMA_PRIORITY 1
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2011-04-23 12:23:44 +00:00
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
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/*
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* UART driver system settings.
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*/
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#define STM32_UART_USE_USART1 FALSE
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2012-01-12 22:08:04 +00:00
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#define STM32_UART_USE_USART2 FALSE
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2011-04-23 12:23:44 +00:00
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#define STM32_UART_USE_USART3 FALSE
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#define STM32_UART_USART2_IRQ_PRIORITY 12
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#define STM32_UART_USART3_IRQ_PRIORITY 12
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_USART3_DMA_PRIORITY 0
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#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
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/*
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* USB driver system settings.
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*/
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#define STM32_USB_USE_USB1 TRUE
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#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
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2012-06-16 06:22:39 +00:00
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#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
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2011-04-23 12:23:44 +00:00
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#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
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