202 lines
6.0 KiB
C
202 lines
6.0 KiB
C
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/**
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* @file STM32/i2c_lld.h
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* @brief STM32 I2C subsystem low level driver header.
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* @addtogroup STM32_I2C
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* @{
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*/
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#ifndef _I2C_LLD_H_
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#define _I2C_LLD_H_
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#if HAL_USE_I2C || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief I2C1 driver enable switch.
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* @details If set to @p TRUE the support for I2C1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
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#define STM32_I2C_USE_I2C1 TRUE
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#endif
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/**
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* @brief I2C2 driver enable switch.
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* @details If set to @p TRUE the support for I2C2 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
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#define STM32_I2C_USE_I2C2 TRUE
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#endif
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/**
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* @brief I2C1 interrupt priority level setting.
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* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2C_I2C1_IRQ_PRIORITY 0xA0
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#endif
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/**
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* @brief I2C2 interrupt priority level setting.
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* @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
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*/
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#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_I2C_I2C2_IRQ_PRIORITY 0xA0
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#define I2CD_NO_ERROR 0
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/** @brief Bus Error.*/
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#define I2CD_BUS_ERROR 0x01
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/** @brief Arbitration Lost (master mode).*/
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#define I2CD_ARBITRATION_LOST 0x02
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/** @brief Acknowledge Failure.*/
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#define I2CD_ACK_FAILURE 0x04
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/** @brief Overrun/Underrun.*/
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#define I2CD_OVERRUN 0x08
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/** @brief PEC Error in reception.*/
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#define I2CD_PEC_ERROR 0x10
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/** @brief Timeout or Tlow Error.*/
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#define I2CD_TIMEOUT 0x20
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/** @brief SMBus Alert.*/
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#define I2CD_SMB_ALERT 0x40
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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typedef enum {
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opmodeI2C,
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opmodeSMBusDevice,
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opmodeSMBusHost,
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} I2C_opMode_t;
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typedef enum {
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stdDutyCycle,
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fastDutyCycle_2,
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fastDutyCycle_16_9,
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} I2C_DutyCycle_t;
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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I2C_opMode_t opMode; /*!< Specifies the I2C mode.*/
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uint32_t ClockSpeed; /*!< Specifies the clock frequency. Must be set to a value lower than 400kHz */
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I2C_DutyCycle_t FastModeDutyCycle;/*!< Specifies the I2C fast mode duty cycle */
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uint8_t OwnAddress7; /*!< Specifies the first device 7-bit own address. */
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uint16_t OwnAddress10; /*!< Specifies the second part of device own address in 10-bit mode. Set to NULL if not used. */
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} I2CConfig;
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/**
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* @brief Type of a structure representing an I2C driver.
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*/
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typedef struct I2CDriver I2CDriver;
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/**
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* @brief Type of a structure representing an I2C slave config.
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*/
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typedef struct I2CSlaveConfig I2CSlaveConfig;
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/**
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* @brief Structure representing an I2C driver.
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*/
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struct I2CDriver{
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/**
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* @brief Driver state.
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*/
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i2cstate_t id_state;
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#if I2C_USE_WAIT
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/**
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* @brief Thread waiting for I/O completion.
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*/
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Thread *thread;
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#endif /* I2C_USE_WAIT */
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#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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#if CH_USE_MUTEXES || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the bus.
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*/
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Mutex id_mutex;
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#elif CH_USE_SEMAPHORES
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Semaphore id_semaphore;
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#endif
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#endif /* I2C_USE_MUTUAL_EXCLUSION */
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/**
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* @brief Current configuration data.
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*/
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I2CConfig *id_config;
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/**
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* @brief Current slave configuration data.
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*/
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I2CSlaveConfig *id_slave_config;
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/**
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* @brief RW-bit sent to slave.
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*/
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uint8_t rw_bit;
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/*********** End of the mandatory fields. **********************************/
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/**
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* @brief Pointer to the I2Cx registers block.
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*/
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I2C_TypeDef *id_i2c;
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} ;
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/** @cond never*/
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#if STM32_I2C_USE_I2C1
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extern I2CDriver I2CD1;
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#endif
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#if STM32_I2C_USE_I2C2
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extern I2CDriver I2CD2;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void i2c_lld_init(void);
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void i2c_lld_start(I2CDriver *i2cp);
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void i2c_lld_stop(I2CDriver *i2cp);
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void i2c_lld_set_clock(I2CDriver *i2cp);
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void i2c_lld_set_opmode(I2CDriver *i2cp);
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void i2c_lld_set_own_address(I2CDriver *i2cp);
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void i2c_lld_master_start(I2CDriver *i2cp);
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void i2c_lld_master_stop(I2CDriver *i2cp);
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void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2c_lld_master_transmit_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
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void i2c_lld_master_receive_NI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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#ifdef __cplusplus
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}
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#endif
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/** @endcond*/
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#endif // CH_HAL_USE_I2C
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#endif // _I2C_LLD_H_
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