2010-05-13 14:02:17 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* STM32 drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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2010-08-08 07:57:28 +00:00
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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2010-05-13 14:02:17 +00:00
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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/*
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* HAL driver system settings.
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*/
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2011-03-12 11:19:24 +00:00
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#define STM32_ACTIVATE_PLL1 TRUE
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#define STM32_ACTIVATE_PLL2 TRUE
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#define STM32_ACTIVATE_PLL3 TRUE
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2010-08-08 07:57:28 +00:00
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_PREDIV1
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#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2
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#define STM32_PREDIV1_VALUE 5
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#define STM32_PLLMUL_VALUE 9
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#define STM32_PREDIV2_VALUE 5
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#define STM32_PLL2MUL_VALUE 8
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2011-03-12 11:19:24 +00:00
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#define STM32_PLL3MUL_VALUE 10
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2010-08-08 07:57:28 +00:00
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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2011-01-15 08:01:07 +00:00
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#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
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2011-03-12 11:19:24 +00:00
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#define STM32_MCO STM32_MCO_PLL3
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2010-05-13 14:02:17 +00:00
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/*
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* ADC driver system settings.
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*/
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2010-08-08 07:57:28 +00:00
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 3
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt()
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2010-05-13 14:02:17 +00:00
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/*
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* CAN driver system settings.
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*/
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2010-08-08 07:57:28 +00:00
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#define STM32_CAN_USE_CAN1 TRUE
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#define STM32_CAN_CAN1_IRQ_PRIORITY 11
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2010-05-13 14:02:17 +00:00
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2011-02-28 19:28:47 +00:00
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 FALSE
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#define STM32_GPT_USE_TIM2 FALSE
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#define STM32_GPT_USE_TIM3 FALSE
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#define STM32_GPT_USE_TIM4 FALSE
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#define STM32_GPT_USE_TIM5 FALSE
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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2010-05-13 14:02:17 +00:00
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/*
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* PWM driver system settings.
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*/
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2010-08-08 07:57:28 +00:00
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#define STM32_PWM_USE_TIM1 TRUE
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#define STM32_PWM_USE_TIM2 FALSE
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#define STM32_PWM_USE_TIM3 FALSE
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#define STM32_PWM_USE_TIM4 FALSE
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2010-11-27 19:16:40 +00:00
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#define STM32_PWM_USE_TIM5 FALSE
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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2010-05-13 14:02:17 +00:00
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/*
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* SERIAL driver system settings.
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*/
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2010-08-08 07:57:28 +00:00
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#define STM32_SERIAL_USE_USART1 FALSE
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2011-03-12 08:25:16 +00:00
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#define STM32_SERIAL_USE_USART2 FALSE
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#define STM32_SERIAL_USE_USART3 TRUE
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2010-08-08 07:57:28 +00:00
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#define STM32_SERIAL_USE_UART4 FALSE
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#define STM32_SERIAL_USE_UART5 FALSE
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART3_PRIORITY 12
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#define STM32_SERIAL_UART4_PRIORITY 12
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#define STM32_SERIAL_UART5_PRIORITY 12
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2010-05-13 14:02:17 +00:00
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/*
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* SPI driver system settings.
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*/
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2011-03-12 08:25:16 +00:00
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 FALSE
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#define STM32_SPI_USE_SPI3 TRUE
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2010-08-08 07:57:28 +00:00
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#define STM32_SPI_SPI1_DMA_PRIORITY 2
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#define STM32_SPI_SPI2_DMA_PRIORITY 2
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#define STM32_SPI_SPI3_DMA_PRIORITY 2
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_SPI3_IRQ_PRIORITY 10
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#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt()
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/*
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* UART driver system settings.
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*/
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#define STM32_UART_USE_USART1 FALSE
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#define STM32_UART_USE_USART2 TRUE
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#define STM32_UART_USE_USART3 FALSE
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#define STM32_UART_USART2_IRQ_PRIORITY 12
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#define STM32_UART_USART3_IRQ_PRIORITY 12
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_USART3_DMA_PRIORITY 0
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#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt()
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#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt()
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