293 lines
8.8 KiB
C
293 lines
8.8 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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---
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes ChibiOS/RT, without being obliged to provide
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the source code for any proprietary components. See the file exception.txt
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for full details of how and when the exception can be applied.
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*/
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/**
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* @file templates/pwm_lld.h
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* @brief PWM Driver subsystem low level driver header template.
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*
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* @addtogroup PWM
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* @{
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*/
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#ifndef _PWM_LLD_H_
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#define _PWM_LLD_H_
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief Number of PWM channels per PWM driver.
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*/
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#define PWM_CHANNELS 1
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/**
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* @brief PWM device interrupt priority level setting.
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*/
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#if !defined(AT91SAM7_PWM_PRIORITY) || defined(__DOXYGEN__)
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#define AT91SAM7_PWM_PRIORITY (AT91C_AIC_PRIOR_HIGHEST - 4)
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#endif
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/**
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* @brief PWMD1 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(PWM_USE_PWM1) || defined(__DOXYGEN__)
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#define PWM_USE_PWM1 TRUE
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#endif
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/**
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* @brief PWMD2 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(PWM_USE_PWM2) || defined(__DOXYGEN__)
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#define PWM_USE_PWM2 TRUE
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#endif
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/**
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* @brief PWMD3 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(PWM_USE_PWM3) || defined(__DOXYGEN__)
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#define PWM_USE_PWM3 TRUE
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#endif
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/**
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* @brief PWMD4 driver enable switch.
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* @details If set to @p TRUE the support for PWMD1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(PWM_USE_PWM4) || defined(__DOXYGEN__)
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#define PWM_USE_PWM4 TRUE
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#endif
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/**
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* @brief PWM left (count up) logic
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*/
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#define PWM_OUTPUT_LEFT 0x00000000
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/**
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* @brief PWM center (count up-down) logic. Gives symetric waveform
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*/
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#define PWM_OUTPUT_CENTER 0x00000010
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/**
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* @brief PWM Master Clock = MCK / 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, CLKA or CLKB. CLKA or CLKB uses the frequency field
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*/
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#define PWM_MCK_DIV_1 0x00000000
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#define PWM_MCK_DIV_2 0x00000100
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#define PWM_MCK_DIV_4 0x00000200
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#define PWM_MCK_DIV_8 0x00000300
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#define PWM_MCK_DIV_16 0x00000400
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#define PWM_MCK_DIV_32 0x00000500
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#define PWM_MCK_DIV_64 0x00000600
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#define PWM_MCK_DIV_128 0x00000700
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#define PWM_MCK_DIV_256 0x00000800
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#define PWM_MCK_DIV_512 0x00000900
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#define PWM_MCK_DIV_1024 0x00000A00
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#define PWM_MCK_DIV_CLKA 0x00000B00
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#define PWM_MCK_DIV_CLKB 0x00000C00
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/**
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* @brief Which PWM output pins to turn on. PIN1 is the lowest numbered pin, PIN2 next lowest, and then on some packages PIN3.
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*/
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#define PWM_OUTPUT_PIN1 0x00001000
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#define PWM_OUTPUT_PIN2 0x00002000
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#define PWM_OUTPUT_PIN3 0x00004000
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/**
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* @brief Which PWM output pins should have pullups disabled.
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*/
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#define PWM_DISABLEPULLUP_PIN1 0x00010000
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#define PWM_DISABLEPULLUP_PIN2 0x00020000
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#define PWM_DISABLEPULLUP_PIN3 0x00040000
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief PWM mode type.
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*/
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typedef uint32_t pwmmode_t;
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/**
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* @brief PWM channel type.
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*/
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typedef uint8_t pwmchannel_t;
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/**
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* @brief PWM counter type.
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*/
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typedef uint16_t pwmcnt_t;
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/**
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* @brief PWM driver channel configuration structure.
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* @note Some architectures may not be able to support the channel mode
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* or the callback, in this case the fields are ignored.
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*/
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typedef struct {
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/**
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* @brief Channel active logic level.
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*/
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pwmmode_t mode;
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/**
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* @brief Channel callback pointer.
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* @note This callback is invoked on the channel compare event. If set to
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* @p NULL then the callback is disabled.
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*/
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pwmcallback_t callback;
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/* End of the mandatory fields.*/
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} PWMChannelConfig;
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/**
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* @brief Driver configuration structure.
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* @note Implementations may extend this structure to contain more,
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* architecture dependent, fields.
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*/
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typedef struct {
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/**
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* @brief Timer clock in Hz.
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* @note The low level can use assertions in order to catch invalid
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* frequency specifications.
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*/
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uint32_t frequency;
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/**
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* @brief PWM period in ticks.
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* @note The low level can use assertions in order to catch invalid
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* period specifications.
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*/
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pwmcnt_t period;
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/**
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* @brief Periodic callback pointer.
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* @note This callback is invoked on PWM counter reset. If set to
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* @p NULL then the callback is disabled.
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*/
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pwmcallback_t callback;
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/**
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* @brief Channels configurations.
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*/
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PWMChannelConfig channels[PWM_CHANNELS];
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/* End of the mandatory fields.*/
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} PWMConfig;
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/**
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* @brief Structure representing an PWM driver.
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* @note Implementations may extend this structure to contain more,
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* architecture dependent, fields.
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*/
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struct PWMDriver {
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/**
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* @brief Driver state.
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*/
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pwmstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const PWMConfig *config;
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/**
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* @brief Current PWM period in ticks.
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*/
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pwmcnt_t period;
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#if defined(PWM_DRIVER_EXT_FIELDS)
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PWM_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief The PWM internal channel number as a bit mask (1, 2, 4 or 8).
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*/
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uint32_t chbit;
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/**
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* @brief Pointer to the PWMCx registers block.
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*/
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AT91S_PWMC_CH *reg;
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/**
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* @brief Pointer to the output pins descriptor.
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*/
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const struct pwmpindefs *pins;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if PWM_USE_PWM1 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD1;
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#endif
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#if PWM_USE_PWM2 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD2;
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#endif
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#if PWM_USE_PWM3 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD3;
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#endif
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#if PWM_USE_PWM4 && !defined(__DOXYGEN__)
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extern PWMDriver PWMD4;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void pwm_lld_init(void);
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void pwm_lld_start(PWMDriver *pwmp);
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void pwm_lld_stop(PWMDriver *pwmp);
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void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period);
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void pwm_lld_enable_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width);
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void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_PWM */
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#endif /* _PWM_LLD_H_ */
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/** @} */
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