2011-04-26 16:59:14 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2012-04-17 19:34:14 +00:00
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2011,2012 Giovanni Di Sirio.
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2011-04-26 16:59:14 +00:00
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/sdc_lld.h
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* @brief STM32 SDC subsystem low level driver header.
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*
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* @addtogroup SDC
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* @{
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*/
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#ifndef _SDC_LLD_H_
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#define _SDC_LLD_H_
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Value to clear all interrupts flag at once.
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*/
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#define STM32_SDIO_ICR_ALL_FLAGS (SDIO_ICR_CCRCFAILC | SDIO_ICR_DCRCFAILC | \
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SDIO_ICR_CTIMEOUTC | SDIO_ICR_DTIMEOUTC | \
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SDIO_ICR_TXUNDERRC | SDIO_ICR_RXOVERRC | \
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SDIO_ICR_CMDRENDC | SDIO_ICR_CMDSENTC | \
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SDIO_ICR_DATAENDC | SDIO_ICR_STBITERRC | \
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SDIO_ICR_DBCKENDC | SDIO_ICR_SDIOITC | \
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SDIO_ICR_CEATAENDC)
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/**
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* @brief Mask of error flags in STA register.
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*/
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#define STM32_SDIO_STA_ERROR_MASK (SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | \
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SDIO_STA_CTIMEOUT | SDIO_STA_DTIMEOUT | \
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SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR)
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2011-05-04 14:38:02 +00:00
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2011-04-26 16:59:14 +00:00
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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2011-11-10 17:54:41 +00:00
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/**
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* @name Configuration options
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* @{
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*/
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2011-04-26 16:59:14 +00:00
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/**
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* @brief SDIO DMA priority (0..3|lowest..highest).
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*/
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#if !defined(STM32_SDC_SDIO_DMA_PRIORITY) || defined(__DOXYGEN__)
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2011-05-14 05:27:09 +00:00
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#define STM32_SDC_SDIO_DMA_PRIORITY 3
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2011-04-26 16:59:14 +00:00
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#endif
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/**
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* @brief SDIO interrupt priority level setting.
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*/
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#if !defined(STM32_SDC_SDIO_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define STM32_SDC_SDIO_IRQ_PRIORITY 9
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#endif
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2012-04-18 16:40:15 +00:00
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/**
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* @brief Write timeout in milliseconds.
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*/
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#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
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#define SDC_WRITE_TIMEOUT_MS 250
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#endif
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/**
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* @brief Read timeout in milliseconds.
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*/
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#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
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#define SDC_READ_TIMEOUT_MS 5
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#endif
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2012-04-18 16:55:19 +00:00
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/**
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* @brief Support for unaligned transfers.
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* @note Unaligned transfers are much slower.
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*/
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#if !defined(STM32_SDC_SDIO_UNALIGNED_SUPPORT) || defined(__DOXYGEN__)
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#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
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#endif
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#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
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/**
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* @brief DMA stream used for SDC operations.
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* @note This option is only available on platforms with enhanced DMA.
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*/
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#if !defined(STM32_SDC_SDIO_DMA_STREAM) || defined(__DOXYGEN__)
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#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
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#endif
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#else /* !STM32_ADVANCED_DMA*/
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#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
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#endif /* !STM32_ADVANCED_DMA*/
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2011-11-10 17:54:41 +00:00
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/** @} */
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2011-05-29 09:09:22 +00:00
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2011-04-26 16:59:14 +00:00
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if !STM32_HAS_SDIO
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#error "SDIO not present in the selected device"
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#endif
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#if !defined(STM32_DMA_REQUIRED)
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#define STM32_DMA_REQUIRED
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#endif
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/*
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* SDIO clock divider.
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*/
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2012-03-05 16:44:56 +00:00
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#if (defined(STM32F4XX) || defined(STM32F2XX))
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2012-04-18 16:40:15 +00:00
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#define STM32_SDIO_DIV_HS 0
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#define STM32_SDIO_DIV_LS 120
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2012-03-05 16:44:56 +00:00
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#elif STM32_HCLK > 48000000
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2012-04-18 16:40:15 +00:00
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#define STM32_SDIO_DIV_HS 1
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#define STM32_SDIO_DIV_LS 178
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2012-03-05 16:44:56 +00:00
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#else
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2012-04-18 16:40:15 +00:00
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#define STM32_SDIO_DIV_HS 0
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#define STM32_SDIO_DIV_LS 118
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2012-03-05 16:44:56 +00:00
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#endif
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/**
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* @brief SDIO data timeouts in SDIO clock cycles.
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*/
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#if (defined(STM32F4XX) || defined(STM32F2XX))
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2012-04-18 16:40:15 +00:00
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#define STM32_SDC_WRITE_TIMEOUT \
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(((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * SDC_WRITE_TIMEOUT_MS)
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#define STM32_SDC_READ_TIMEOUT \
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(((STM32_PLL48CLK / (STM32_SDIO_DIV_HS + 2)) / 1000) * SDC_READ_TIMEOUT_MS)
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2011-04-26 16:59:14 +00:00
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#else
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2012-04-18 16:40:15 +00:00
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#define STM32_SDC_WRITE_TIMEOUT \
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(((STM32_HCLK /((STM32_SDIO_DIV_HS + 2)) / 1000) * SDC_WRITE_TIMEOUT_MS)
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#define STM32_SDC_READ_TIMEOUT \
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(((STM32_HCLK /((STM32_SDIO_DIV_HS + 2)) / 1000) * SDC_READ_TIMEOUT_MS)
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2011-04-26 16:59:14 +00:00
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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2011-04-30 07:52:35 +00:00
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/**
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* @brief Type of SDIO bus mode.
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*/
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typedef enum {
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SDC_MODE_1BIT = 0,
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SDC_MODE_4BIT,
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SDC_MODE_8BIT
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} sdcbusmode_t;
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2011-04-26 16:59:14 +00:00
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2011-05-01 09:10:22 +00:00
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/**
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* @brief Type of card flags.
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*/
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typedef uint32_t sdcmode_t;
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2012-04-16 18:19:34 +00:00
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/**
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* @brief SDC Driver condition flags type.
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*/
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typedef uint32_t sdcflags_t;
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2011-04-26 16:59:14 +00:00
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/**
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* @brief Type of a structure representing an SDC driver.
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*/
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typedef struct SDCDriver SDCDriver;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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2011-04-30 10:14:07 +00:00
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uint32_t dummy;
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2011-04-26 16:59:14 +00:00
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} SDCConfig;
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/**
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* @brief Structure representing an SDC driver.
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*/
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struct SDCDriver {
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/**
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* @brief Driver state.
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*/
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sdcstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const SDCConfig *config;
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2011-05-01 09:10:22 +00:00
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/**
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* @brief Various flags regarding the mounted card.
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*/
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sdcmode_t cardmode;
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Errors flags.
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*/
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2012-04-16 18:19:34 +00:00
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sdcflags_t errors;
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2011-05-01 11:14:23 +00:00
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/**
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* @brief Card CID.
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*/
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uint32_t cid[4];
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/**
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* @brief Card CSD.
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*/
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uint32_t csd[4];
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2011-05-09 17:54:23 +00:00
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/**
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* @brief Card RCA.
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*/
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uint32_t rca;
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Total number of blocks in card.
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*/
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uint32_t capacity;
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2011-04-26 16:59:14 +00:00
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/* End of the mandatory fields.*/
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2011-05-02 19:49:35 +00:00
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/**
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2011-08-25 15:14:09 +00:00
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* @brief Thread waiting for I/O completion IRQ.
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2011-05-02 19:49:35 +00:00
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*/
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Thread *thread;
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2012-03-05 16:44:56 +00:00
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/**
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* @brief DMA mode bit mask.
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*/
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uint32_t dmamode;
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/**
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* @brief Transmit DMA channel.
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*/
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const stm32_dma_stream_t *dma;
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/**
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* @brief Pointer to the SDIO registers block.
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* @note Used only for dubugging purpose.
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*/
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#if CH_DBG_ENABLE_ASSERTS
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SDIO_TypeDef *sdio;
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#endif
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2011-04-26 16:59:14 +00:00
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if !defined(__DOXYGEN__)
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extern SDCDriver SDCD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sdc_lld_init(void);
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void sdc_lld_start(SDCDriver *sdcp);
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void sdc_lld_stop(SDCDriver *sdcp);
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2011-05-01 09:10:22 +00:00
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void sdc_lld_start_clk(SDCDriver *sdcp);
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2011-04-30 07:52:35 +00:00
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void sdc_lld_set_data_clk(SDCDriver *sdcp);
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void sdc_lld_stop_clk(SDCDriver *sdcp);
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void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode);
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2011-04-26 16:59:14 +00:00
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void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg);
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bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp);
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2011-05-01 10:33:44 +00:00
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bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp);
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bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
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uint32_t *resp);
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2011-05-07 13:24:04 +00:00
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bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buf, uint32_t n);
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bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
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const uint8_t *buf, uint32_t n);
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2011-06-04 15:41:07 +00:00
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bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp);
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2011-05-29 16:19:21 +00:00
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bool_t sdc_lld_is_write_protected(SDCDriver *sdcp);
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2011-04-26 16:59:14 +00:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SDC */
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#endif /* _SDC_LLD_H_ */
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/** @} */
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