2010-11-15 19:44:09 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ch.h"
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#include "hal.h"
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#include "test.h"
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2010-11-21 13:45:22 +00:00
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static void pwmpcb(PWMDriver *pwmp);
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static void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n);
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2010-11-21 14:21:11 +00:00
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static void spicb(SPIDriver *spip);
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2010-11-21 13:45:22 +00:00
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2010-11-21 14:21:11 +00:00
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/* Total number of channels to be sampled by a single ADC operation.*/
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2010-11-21 13:45:22 +00:00
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#define ADC_GRP1_NUM_CHANNELS 2
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/* Depth of the conversion buffer, channels are sampled four times each.*/
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2010-11-21 13:45:22 +00:00
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#define ADC_GRP1_BUF_DEPTH 4
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/*
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* ADC samples buffer.
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*/
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2010-11-21 14:21:11 +00:00
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static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
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2010-11-21 13:45:22 +00:00
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/*
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* ADC conversion group.
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* Mode: Linear buffer, 4 samples of 2 channels, SW triggered.
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* Channels: IN10, Sensor.
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*/
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static const ADCConversionGroup adcgrpcfg = {
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FALSE,
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ADC_GRP1_NUM_CHANNELS,
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adccb,
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0,
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2010-11-21 19:10:46 +00:00
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ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT,
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0,
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0,
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ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),
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0,
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ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ0_N(ADC_CHANNEL_SENSOR)
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};
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/*
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* ADC configuration structure, empty for STM32, there is nothing to configure.
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*/
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static const ADCConfig adccfg = {
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};
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/*
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* PWM configuration structure.
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* Cyclic callback enabled, channels 3 and 4 enabled without callbacks,
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* the active state is a logic one.
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2010-11-21 13:45:22 +00:00
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*/
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static PWMConfig pwmcfg = {
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pwmpcb,
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{
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{PWM_OUTPUT_DISABLED, NULL},
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{PWM_OUTPUT_DISABLED, NULL},
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{PWM_OUTPUT_ACTIVE_HIGH, NULL},
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{PWM_OUTPUT_ACTIVE_HIGH, NULL}
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},
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PWM_COMPUTE_PSC(STM32_TIMCLK1, 10000), /* 10KHz PWM clock frequency. */
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PWM_COMPUTE_ARR(10000, 1000000000), /* PWM period 1S (in nS). */
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0
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};
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2010-11-21 14:21:11 +00:00
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/*
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* SPI configuration structure.
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* Maximum speed (12MHz), CPHA=0, CPOL=0, 16bits frames, MSb transmitted first.
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* The slave select line is the pin GPIOA_SPI1NSS on the port GPIOA.
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*/
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static const SPIConfig spicfg = {
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spicb,
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GPIOA,
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GPIOA_SPI1NSS,
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SPI_CR1_DFF
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};
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2010-11-21 13:45:22 +00:00
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/*
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* PWM cyclic callback. PWM channels are reprogrammed using a duty cycle
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* calculated as average of the last sampling operations.
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*/
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static void pwmpcb(PWMDriver *pwmp) {
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2010-11-22 17:35:15 +00:00
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2010-11-22 17:54:09 +00:00
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(void)pwmp;
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2010-11-21 13:45:22 +00:00
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/* Starts an asynchronous ADC conversion operation, the conversion
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will be executed in parallel to the current PWM cycle and will
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terminate before the next PWM cycle.*/
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2010-11-22 17:50:39 +00:00
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chSysLockFromIsr();
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adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
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2010-11-21 13:45:22 +00:00
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chSysUnlockFromIsr();
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}
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2010-11-15 19:44:09 +00:00
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/*
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* ADC end conversion callback.
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* The latest samples are transmitted into a single SPI transaction.
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2010-11-21 13:45:22 +00:00
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*/
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void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
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2010-11-21 14:21:11 +00:00
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(void) buffer; (void) n;
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/* Note, only in the ADC_COMPLETE state because the ADC driver fires an
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intermediate callback when the buffer is half full.*/
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if (adcp->ad_state == ADC_COMPLETE) {
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adcsample_t avg_ch1, avg_ch2;
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/* Calculates the average values from the ADC samples.*/
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avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;
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avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;
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2010-11-21 14:21:11 +00:00
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chSysLockFromIsr();
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2010-11-22 17:50:39 +00:00
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/* Changes the channels pulse width, the change will be effective
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starting from the next cycle.*/
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pwmEnableChannelI(&PWMD3, 2, PWM_FRACTION_TO_WIDTH(&PWMD3, 4096, avg_ch1));
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pwmEnableChannelI(&PWMD3, 3, PWM_FRACTION_TO_WIDTH(&PWMD3, 4096, avg_ch2));
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/* SPI slave selection and transmission start.*/
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spiSelectI(&SPID1);
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spiStartSendI(&SPID1, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);
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2010-11-21 14:21:11 +00:00
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chSysUnlockFromIsr();
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}
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}
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/*
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* SPI end transfer callback.
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*/
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static void spicb(SPIDriver *spip) {
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/* On transfer end just releases the slave select line.*/
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chSysLockFromIsr();
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spiUnselectI(spip);
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chSysUnlockFromIsr();
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2010-11-21 13:45:22 +00:00
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}
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/*
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* This is a periodic thread that does absolutely nothing except sleeping and
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* increase a counter.
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2010-11-15 19:44:09 +00:00
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*/
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static WORKING_AREA(waThread1, 128);
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static msg_t Thread1(void *arg) {
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static uint32_t seconds_counter;
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2010-11-15 19:44:09 +00:00
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(void)arg;
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while (TRUE) {
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chThdSleepMilliseconds(1000);
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seconds_counter++;
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2010-11-15 19:44:09 +00:00
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}
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return 0;
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}
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/*
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* Entry point, note, the main() function is already a thread in the system
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* on entry.
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*/
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int main(int argc, char **argv) {
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(void)argc;
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(void)argv;
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/*
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* Activates the serial driver 1 using the driver default configuration.
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*/
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sdStart(&SD1, NULL);
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2010-11-21 14:21:11 +00:00
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/*
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* Initializes the SPI driver 1.
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*/
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spiStart(&SPID1, &spicfg);
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2010-11-21 13:45:22 +00:00
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/*
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* Initializes the ADC driver 1.
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2010-11-21 19:10:46 +00:00
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* The pin PC0 on the port GPIOC is programmed as analog input.
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2010-11-21 13:45:22 +00:00
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*/
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adcStart(&ADCD1, &adccfg);
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2010-11-21 19:10:46 +00:00
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palSetGroupMode(GPIOC, PAL_PORT_BIT(0), PAL_MODE_INPUT_ANALOG);
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2010-11-21 13:45:22 +00:00
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/*
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* Initializes the PWM driver 1, re-routes the TIM3 outputs, programs the
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* pins as alternate functions and finally enables channels with zero
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* initial duty cycle.
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* Note, the AFIO access routes the TIM3 output pins on the PC6...PC9
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* where the LEDs are connected.
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*/
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pwmStart(&PWMD3, &pwmcfg);
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AFIO->MAPR |= AFIO_MAPR_TIM3_REMAP_0 | AFIO_MAPR_TIM3_REMAP_1;
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palSetGroupMode(GPIOC, PAL_PORT_BIT(GPIOC_LED3) | PAL_PORT_BIT(GPIOC_LED4),
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PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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2010-11-15 19:44:09 +00:00
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/*
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2010-11-21 14:21:11 +00:00
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* Creates the example thread.
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2010-11-15 19:44:09 +00:00
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*/
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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/*
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* Normal main() thread activity, in this demo it does nothing except
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* sleeping in a loop and check the button state.
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*/
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while (TRUE) {
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2010-11-21 19:10:46 +00:00
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if (palReadPad(GPIOA, GPIOA_BUTTON))
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2010-11-15 19:44:09 +00:00
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TestThread(&SD1);
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chThdSleepMilliseconds(500);
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}
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return 0;
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}
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