2015-08-23 11:24:02 +00:00
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/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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2015-08-26 12:42:52 +00:00
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#include <string.h>
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2015-08-23 11:24:02 +00:00
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#include "ch.h"
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#include "hal.h"
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/*===========================================================================*/
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/* SPI driver related. */
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/*===========================================================================*/
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2015-08-26 12:42:52 +00:00
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#define SPI_LOOPBACK
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2015-08-23 11:24:02 +00:00
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/*
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* Maximum speed SPI configuration (27MHz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig hs_spicfg = {
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NULL,
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2015-08-26 10:03:11 +00:00
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GPIOB,
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GPIOB_ARD_D15,
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SPI_CR1_BR_0,
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2015-08-23 11:24:02 +00:00
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SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
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};
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/*
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* Low speed SPI configuration (421.875kHz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig ls_spicfg = {
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NULL,
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2015-08-26 10:03:11 +00:00
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GPIOB,
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GPIOB_ARD_D14,
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2015-08-23 11:24:02 +00:00
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SPI_CR1_BR_2 | SPI_CR1_BR_1,
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SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
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};
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/*
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* SPI TX and RX buffers.
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2015-08-26 12:42:52 +00:00
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* Note, the buffer are aligned to a 32 bytes boundary because limitations
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* imposed by the data cache. Note, this is GNU specific, it must be
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* handled differently for other compilers.
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2015-08-23 11:24:02 +00:00
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*/
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2015-08-26 12:42:52 +00:00
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#define SPI_BUFFERS_SIZE 128U
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static uint8_t txbuf[SPI_BUFFERS_SIZE];
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static uint8_t rxbuf[SPI_BUFFERS_SIZE];
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2015-08-23 11:24:02 +00:00
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/*===========================================================================*/
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/* Application code. */
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/*===========================================================================*/
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/*
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* SPI bus contender 1.
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*/
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static THD_WORKING_AREA(spi_thread_1_wa, 256);
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static THD_FUNCTION(spi_thread_1, p) {
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(void)p;
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chRegSetThreadName("SPI thread 1");
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while (true) {
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2015-08-26 12:42:52 +00:00
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unsigned i;
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/* Bush acquisition and SPI reprogramming.*/
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spiAcquireBus(&SPID2);
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spiStart(&SPID2, &hs_spicfg);
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/* Preparing data buffer and flushing cache.*/
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for (i = 0; i < SPI_BUFFERS_SIZE; i++)
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txbuf[i] = (uint8_t)i;
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/* Slave selection and data exchange.*/
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spiSelect(&SPID2);
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spiExchange(&SPID2, SPI_BUFFERS_SIZE, txbuf, rxbuf);
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spiUnselect(&SPID2);
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#if defined(SPI_LOOPBACK)
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if (memcmp(txbuf, rxbuf, SPI_BUFFERS_SIZE) != 0)
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chSysHalt("loopback failure");
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#endif
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/* Releasing the bus.*/
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spiReleaseBus(&SPID2);
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2015-08-23 11:24:02 +00:00
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}
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}
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/*
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* SPI bus contender 2.
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*/
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static THD_WORKING_AREA(spi_thread_2_wa, 256);
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static THD_FUNCTION(spi_thread_2, p) {
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(void)p;
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chRegSetThreadName("SPI thread 2");
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while (true) {
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2015-08-26 12:42:52 +00:00
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unsigned i;
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/* Bush acquisition and SPI reprogramming.*/
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spiAcquireBus(&SPID2);
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spiStart(&SPID2, &ls_spicfg);
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/* Preparing data buffer and flushing cache.*/
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for (i = 0; i < SPI_BUFFERS_SIZE; i++)
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txbuf[i] = (uint8_t)(128U + i);
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/* Slave selection and data exchange.*/
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spiSelect(&SPID2);
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spiExchange(&SPID2, SPI_BUFFERS_SIZE, txbuf, rxbuf);
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spiUnselect(&SPID2);
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#if defined(SPI_LOOPBACK)
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if (memcmp(txbuf, rxbuf, SPI_BUFFERS_SIZE) != 0)
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chSysHalt("loopback failure");
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#endif
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/* Releasing the bus.*/
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spiReleaseBus(&SPID2);
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2015-08-23 11:24:02 +00:00
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}
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}
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/*
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* Application entry point.
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*/
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int main(void) {
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/*
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* SPI2 I/O pins setup.
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*/
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palSetPadMode(GPIOI,
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GPIOI_ARD_D13,
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2015-08-26 10:03:11 +00:00
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PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* SPI SCK. */
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2015-08-23 11:24:02 +00:00
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palSetPadMode(GPIOB,
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GPIOB_ARD_D12,
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PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* MISO. */
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palSetPadMode(GPIOB,
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GPIOB_ARD_D11,
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PAL_MODE_ALTERNATE(5) |
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PAL_STM32_OSPEED_HIGHEST); /* MOSI. */
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2015-08-26 10:03:11 +00:00
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palSetPad(GPIOB, GPIOB_ARD_D15);
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palSetPadMode(GPIOB,
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GPIOB_ARD_D15,
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PAL_MODE_OUTPUT_PUSHPULL); /* CS0. */
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palSetPad(GPIOB, GPIOB_ARD_D14);
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palSetPadMode(GPIOB,
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GPIOB_ARD_D14,
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PAL_MODE_OUTPUT_PUSHPULL); /* CS1. */
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2015-08-23 11:24:02 +00:00
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/*
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* Starting the transmitter and receiver threads.
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*/
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chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
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NORMALPRIO + 1, spi_thread_1, NULL);
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chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa),
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NORMALPRIO + 1, spi_thread_2, NULL);
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/*
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* Normal main() thread activity, in this demo it does nothing.
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*/
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while (true) {
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chThdSleepMilliseconds(500);
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}
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}
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