384 lines
10 KiB
C
384 lines
10 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file LPC122x/serial_lld.c
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* @brief LPC122x low level serial driver code.
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*
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* @addtogroup SERIAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_SERIAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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#if LPC122x_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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/** @brief UART0 serial driver identifier.*/
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SerialDriver SD1;
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#endif
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#if LPC122x_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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/** @brief UART0 serial driver identifier.*/
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SerialDriver SD2;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/** @brief Driver default configuration.*/
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static const SerialConfig default_config = {
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SERIAL_DEFAULT_BITRATE,
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LCR_WL8 | LCR_STOP1 | LCR_NOPARITY,
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FCR_TRIGGER0
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};
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief UART initialization.
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*
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* @param[in] sdp communication channel associated to the UART
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* @param[in] config the architecture-dependent serial driver configuration
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*/
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static void uart_init(SerialDriver *sdp, const SerialConfig *config) {
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LPC_UART0_Type *u = sdp->uart;
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uint32_t upclk;
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#if LPC122x_SERIAL_USE_UART0
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if (&SD1 == sdp) {
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upclk = LPC122x_SERIAL_UART0_PCLK;
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}
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#endif
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#if LPC122x_SERIAL_USE_UART1
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if (&SD2 == sdp) {
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upclk = LPC122x_SERIAL_UART1_PCLK;
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}
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#endif
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uint32_t div = upclk / (config->sc_speed << 4);
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u->LCR = config->sc_lcr | LCR_DLAB;
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u->DLL = div;
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u->DLM = div >> 8;
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u->LCR = config->sc_lcr;
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u->FCR = FCR_ENABLE | FCR_RXRESET | FCR_TXRESET | config->sc_fcr;
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u->ACR = 0;
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u->FDR = 0x10;
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u->TER = TER_ENABLE;
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u->IER = IER_RBR | IER_STATUS;
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}
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/**
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* @brief UART de-initialization.
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*
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* @param[in] u pointer to an UART I/O block
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*/
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static void uart_deinit(LPC_UART0_Type *u) {
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u->LCR = LCR_DLAB;
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u->DLL = 1;
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u->DLM = 0;
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u->LCR = 0;
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u->FDR = 0x10;
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u->IER = 0;
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u->FCR = FCR_RXRESET | FCR_TXRESET;
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u->ACR = 0;
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u->TER = TER_ENABLE;
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}
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/**
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* @brief Error handling routine.
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*
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* @param[in] sdp communication channel associated to the UART
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* @param[in] err UART LSR register value
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*/
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static void set_error(SerialDriver *sdp, IOREG32 err) {
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flagsmask_t sts = 0;
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if (err & LSR_OVERRUN)
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sts |= SD_OVERRUN_ERROR;
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if (err & LSR_PARITY)
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sts |= SD_PARITY_ERROR;
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if (err & LSR_FRAMING)
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sts |= SD_FRAMING_ERROR;
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if (err & LSR_BREAK)
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sts |= SD_BREAK_DETECTED;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, sts);
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chSysUnlockFromIsr();
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}
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/**
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* @brief Common IRQ handler.
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* @note Tries hard to clear all the pending interrupt sources, we don't
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* want to go through the whole ISR and have another interrupt soon
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* after.
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*
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* @param[in] u pointer to an UART I/O block
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* @param[in] sdp communication channel associated to the UART
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*/
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static void serve_interrupt(SerialDriver *sdp) {
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LPC_UART0_Type *u = sdp->uart;
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while (TRUE) {
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switch (u->IIR & IIR_SRC_MASK) {
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case IIR_SRC_NONE:
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return;
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case IIR_SRC_ERROR:
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set_error(sdp, u->LSR);
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break;
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case IIR_SRC_TIMEOUT:
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case IIR_SRC_RX:
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chSysLockFromIsr();
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if (chIQIsEmptyI(&sdp->iqueue))
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chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE);
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chSysUnlockFromIsr();
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while (u->LSR & LSR_RBR_FULL) {
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chSysLockFromIsr();
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if (chIQPutI(&sdp->iqueue, u->RBR) < Q_OK)
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chnAddFlagsI(sdp, SD_OVERRUN_ERROR);
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chSysUnlockFromIsr();
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}
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break;
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case IIR_SRC_TX:
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{
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int i = LPC122x_SERIAL_FIFO_PRELOAD;
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do {
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msg_t b;
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chSysLockFromIsr();
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b = chOQGetI(&sdp->oqueue);
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chSysUnlockFromIsr();
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if (b < Q_OK) {
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u->IER &= ~IER_THRE;
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chSysLockFromIsr();
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chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
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chSysUnlockFromIsr();
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break;
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}
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u->THR = b;
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} while (--i);
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}
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break;
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default:
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(void) u->THR;
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(void) u->RBR;
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}
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}
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}
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/**
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* @brief Attempts a TX FIFO preload.
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*/
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static void preload(SerialDriver *sdp) {
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LPC_UART0_Type *u = sdp->uart;
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if (u->LSR & LSR_THRE) {
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int i = LPC122x_SERIAL_FIFO_PRELOAD;
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do {
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msg_t b = chOQGetI(&sdp->oqueue);
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if (b < Q_OK) {
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chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY);
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return;
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}
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u->THR = b;
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} while (--i);
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}
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u->IER |= IER_THRE;
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}
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/**
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* @brief Driver SD1 output notification.
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*/
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#if LPC122x_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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static void notify1(GenericQueue *qp) {
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(void)qp;
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preload(&SD1);
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}
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#endif
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/**
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* @brief Driver SD2 output notification.
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*/
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#if LPC122x_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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static void notify2(GenericQueue *qp) {
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(void)qp;
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preload(&SD2);
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}
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#endif
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/**
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* @brief UART0 IRQ handler.
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*
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* @isr
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*/
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#if LPC122x_SERIAL_USE_UART0 || defined(__DOXYGEN__)
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CH_IRQ_HANDLER(Vector88) {
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CH_IRQ_PROLOGUE();
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serve_interrupt(&SD1);
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CH_IRQ_EPILOGUE();
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}
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#endif
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/**
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* @brief UART0 IRQ handler.
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*
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* @isr
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*/
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#if LPC122x_SERIAL_USE_UART1 || defined(__DOXYGEN__)
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CH_IRQ_HANDLER(Vector8C) {
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CH_IRQ_PROLOGUE();
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serve_interrupt(&SD2);
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CH_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level serial driver initialization.
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*
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* @notapi
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*/
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void sd_lld_init(void) {
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#if LPC122x_SERIAL_USE_UART0
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sdObjectInit(&SD1, NULL, notify1);
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SD1.uart = LPC_UART0;
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#if LLPC122x_SERIAL_RXD0_SELECTOR == RXD0_IS_PIO0_1
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LPC_IOCON->PIO0_1 = 0x82; /* RDX0 without resistors. */
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#else /* LPC122x_SERIAL_RXD0_SELECTOR == RXD1_IS_PIO2_1 */
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LPC_IOCON->PIO2_1 = 0x84; /* RXD0 without resistors. */
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#endif
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#if LLPC122x_SERIAL_TXD0_SELECTOR == TXD0_IS_PIO0_8
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LPC_IOCON->PIO0_2 = 0x82; /* TDX0 without resistors. */
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#else /* LPC122x_SERIAL_TXD0_SELECTOR == TXD0_IS_PIO2_2 */
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LPC_IOCON->PIO2_2 = 0x84; /* TXD0 without resistors. */
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#endif
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#endif
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#if LPC122x_SERIAL_USE_UART1
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sdObjectInit(&SD2, NULL, notify1);
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SD2.uart = (LPC_UART0_Type *) LPC_UART1;
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#if LLPC122x_SERIAL_RXD1_SELECTOR == RXD1_IS_PIO0_8
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LPC_IOCON->PIO0_8 = 0x82; /* RXD1 without resistors. */
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#elif LPC122x_SERIAL_RXD1_SELECTOR == RXD1_IS_PIO2_11
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LPC_IOCON->PIO2_11 = 0x85; /* RXD1 without resistors. */
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#else /* LPC122x_SERIAL_RXD1_SELECTOR == RXD1_IS_PIO2_12 */
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LPC_IOCON->PIO2_12 = 0x83; /* RXD1 without resistors. */
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#endif
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#if LLPC122x_SERIAL_TXD1_SELECTOR == TXD1_IS_PIO0_8
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LPC_IOCON->PIO0_9 = 0x82; /* TXD1 without resistors. */
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#elif LPC122x_SERIAL_TXD1_SELECTOR == TXD1_IS_PIO2_11
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LPC_IOCON->PIO2_10 = 0x85; /* TXD1 without resistors. */
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#else /* LPC122x_SERIAL_TXD1_SELECTOR == TXD1_IS_PIO2_12 */
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LPC_IOCON->PIO2_13 = 0x83; /* TXD1 without resistors. */
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#endif
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#endif
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}
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/**
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* @brief Low level serial driver configuration and (re)start.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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* @param[in] config the architecture-dependent serial driver configuration.
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* If this parameter is set to @p NULL then a default
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* configuration is used.
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*
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* @notapi
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*/
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void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
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if (config == NULL)
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config = &default_config;
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if (sdp->state == SD_STOP) {
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#if LPC122x_SERIAL_USE_UART0
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if (&SD1 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);
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LPC_SYSCON->UART0CLKDIV = LPC122x_SERIAL_UART0CLKDIV;
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nvicEnableVector(UART0_IRQn,
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CORTEX_PRIORITY_MASK(LPC122x_SERIAL_UART0_IRQ_PRIORITY));
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}
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#endif
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#if LPC122x_SERIAL_USE_UART1
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if (&SD2 == sdp) {
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LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 13);
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LPC_SYSCON->UART1CLKDIV = LPC122x_SERIAL_UART1CLKDIV;
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nvicEnableVector(UART1_IRQn,
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CORTEX_PRIORITY_MASK(LPC122x_SERIAL_UART1_IRQ_PRIORITY));
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}
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#endif
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}
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uart_init(sdp, config);
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}
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/**
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* @brief Low level serial driver stop.
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* @details De-initializes the UART, stops the associated clock, resets the
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* interrupt vector.
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*
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* @param[in] sdp pointer to a @p SerialDriver object
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*
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* @notapi
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*/
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void sd_lld_stop(SerialDriver *sdp) {
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if (sdp->state == SD_READY) {
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uart_deinit(sdp->uart);
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#if LPC122x_SERIAL_USE_UART0
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if (&SD1 == sdp) {
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LPC_SYSCON->UART0CLKDIV = 0;
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 12);
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nvicDisableVector(UART0_IRQn);
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return;
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}
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#endif
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#if LPC122x_SERIAL_USE_UART1
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if (&SD2 == sdp) {
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LPC_SYSCON->UART1CLKDIV = 0;
|
||
|
|
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 13);
|
||
|
|
nvicDisableVector(UART1_IRQn);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* HAL_USE_SERIAL */
|
||
|
|
|
||
|
|
/** @} */
|