2013-08-04 13:38:53 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/OTGv1/usb_lld.c
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* @brief STM32 USB subsystem low level driver source.
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*
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* @addtogroup USB
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* @{
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*/
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#include <string.h>
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#include "hal.h"
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#if HAL_USE_USB || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#define TRDT_VALUE 5
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/** @brief OTG_FS driver identifier.*/
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#if STM32_USB_USE_OTG1 || defined(__DOXYGEN__)
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USBDriver USBD1;
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#endif
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/** @brief OTG_HS driver identifier.*/
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#if STM32_USB_USE_OTG2 || defined(__DOXYGEN__)
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USBDriver USBD2;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/**
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* @brief EP0 state.
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* @note It is an union because IN and OUT endpoints are never used at the
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* same time for EP0.
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*/
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static union {
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/**
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* @brief IN EP0 state.
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*/
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USBInEndpointState in;
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/**
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* @brief OUT EP0 state.
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*/
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USBOutEndpointState out;
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} ep0_state;
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/**
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* @brief Buffer for the EP0 setup packets.
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*/
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static uint8_t ep0setup_buffer[8];
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/**
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* @brief EP0 initialization structure.
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*/
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static const USBEndpointConfig ep0config = {
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USB_EP_MODE_TYPE_CTRL,
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_usb_ep0setup,
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_usb_ep0in,
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_usb_ep0out,
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0x40,
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0x40,
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&ep0_state.in,
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&ep0_state.out,
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1,
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ep0setup_buffer
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};
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#if STM32_USB_USE_OTG1
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static const stm32_otg_params_t fsparams = {
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STM32_USB_OTG1_RX_FIFO_SIZE / 4,
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STM32_OTG1_FIFO_MEM_SIZE,
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STM32_OTG1_ENDOPOINTS_NUMBER
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};
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#endif
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#if STM32_USB_USE_OTG2
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static const stm32_otg_params_t hsparams = {
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STM32_USB_OTG2_RX_FIFO_SIZE / 4,
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STM32_OTG2_FIFO_MEM_SIZE,
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STM32_OTG2_ENDOPOINTS_NUMBER
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};
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#endif
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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static void otg_core_reset(USBDriver *usbp) {
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stm32_otg_t *otgp = usbp->otg;
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2013-11-11 12:14:43 +00:00
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osalSysPolledDelayX(32);
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2013-11-02 10:46:10 +00:00
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2013-08-04 13:38:53 +00:00
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/* Core reset and delay of at least 3 PHY cycles.*/
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otgp->GRSTCTL = GRSTCTL_CSRST;
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while ((otgp->GRSTCTL & GRSTCTL_CSRST) != 0)
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;
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2013-11-02 10:46:10 +00:00
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2013-11-11 12:14:43 +00:00
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osalSysPolledDelayX(12);
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2013-11-02 10:46:10 +00:00
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2013-08-04 13:38:53 +00:00
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/* Wait AHB idle condition.*/
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while ((otgp->GRSTCTL & GRSTCTL_AHBIDL) == 0)
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;
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}
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static void otg_disable_ep(USBDriver *usbp) {
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stm32_otg_t *otgp = usbp->otg;
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unsigned i;
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for (i = 0; i <= usbp->otgparams->num_endpoints; i++) {
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/* Disable only if enabled because this sentence in the manual:
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"The application must set this bit only if Endpoint Enable is
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already set for this endpoint".*/
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if ((otgp->ie[i].DIEPCTL & DIEPCTL_EPENA) != 0) {
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otgp->ie[i].DIEPCTL = DIEPCTL_EPDIS;
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/* Wait for endpoint disable.*/
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while (!(otgp->ie[i].DIEPINT & DIEPINT_EPDISD))
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;
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}
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else
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otgp->ie[i].DIEPCTL = 0;
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otgp->ie[i].DIEPTSIZ = 0;
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otgp->ie[i].DIEPINT = 0xFFFFFFFF;
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/* Disable only if enabled because this sentence in the manual:
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"The application must set this bit only if Endpoint Enable is
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already set for this endpoint".
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Note that the attempt to disable the OUT EP0 is ignored by the
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hardware but the code is simpler this way.*/
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if ((otgp->oe[i].DOEPCTL & DOEPCTL_EPENA) != 0) {
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otgp->oe[i].DOEPCTL = DOEPCTL_EPDIS;
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/* Wait for endpoint disable.*/
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while (!(otgp->oe[i].DOEPINT & DOEPINT_OTEPDIS))
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;
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}
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else
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otgp->oe[i].DOEPCTL = 0;
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otgp->oe[i].DOEPTSIZ = 0;
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otgp->oe[i].DOEPINT = 0xFFFFFFFF;
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}
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otgp->DAINTMSK = DAINTMSK_OEPM(0) | DAINTMSK_IEPM(0);
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}
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static void otg_rxfifo_flush(USBDriver *usbp) {
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stm32_otg_t *otgp = usbp->otg;
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otgp->GRSTCTL = GRSTCTL_RXFFLSH;
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while ((otgp->GRSTCTL & GRSTCTL_RXFFLSH) != 0)
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;
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/* Wait for 3 PHY Clocks.*/
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2013-09-14 10:00:36 +00:00
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osalSysPolledDelayX(12);
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2013-08-04 13:38:53 +00:00
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}
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static void otg_txfifo_flush(USBDriver *usbp, uint32_t fifo) {
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stm32_otg_t *otgp = usbp->otg;
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otgp->GRSTCTL = GRSTCTL_TXFNUM(fifo) | GRSTCTL_TXFFLSH;
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while ((otgp->GRSTCTL & GRSTCTL_TXFFLSH) != 0)
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;
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/* Wait for 3 PHY Clocks.*/
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2013-09-14 10:00:36 +00:00
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osalSysPolledDelayX(12);
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2013-08-04 13:38:53 +00:00
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}
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/**
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* @brief Resets the FIFO RAM memory allocator.
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*
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* @param[in] usbp pointer to the @p USBDriver object
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*
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* @notapi
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*/
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static void otg_ram_reset(USBDriver *usbp) {
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usbp->pmnext = usbp->otgparams->rx_fifo_size;
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}
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/**
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* @brief Allocates a block from the FIFO RAM memory.
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*
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* @param[in] usbp pointer to the @p USBDriver object
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* @param[in] size size of the packet buffer to allocate in words
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*
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* @notapi
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*/
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static uint32_t otg_ram_alloc(USBDriver *usbp, size_t size) {
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uint32_t next;
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next = usbp->pmnext;
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usbp->pmnext += size;
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2013-09-14 10:00:36 +00:00
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osalDbgAssert(usbp->pmnext <= usbp->otgparams->otg_ram_size,
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"OTG FIFO memory overflow");
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2013-08-04 13:38:53 +00:00
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return next;
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}
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/**
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* @brief Pushes a series of words into a FIFO.
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*
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* @param[in] fifop pointer to the FIFO register
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* @param[in] buf pointer to the words buffer, not necessarily word
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* aligned
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* @param[in] n number of words to push
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*
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* @return A pointer after the last word pushed.
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*
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* @notapi
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*/
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static uint8_t *otg_do_push(volatile uint32_t *fifop, uint8_t *buf, size_t n) {
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while (n > 0) {
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/* Note, this line relies on the Cortex-M3/M4 ability to perform
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unaligned word accesses and on the LSB-first memory organization.*/
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*fifop = *((uint32_t *)buf);
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buf += 4;
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n--;
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}
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return buf;
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}
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/**
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* @brief Writes to a TX FIFO.
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*
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* @param[in] fifop pointer to the FIFO register
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* @param[in] buf buffer where to copy the endpoint data
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* @param[in] n maximum number of bytes to copy
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*
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* @notapi
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*/
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static void otg_fifo_write_from_buffer(volatile uint32_t *fifop,
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const uint8_t *buf,
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size_t n) {
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otg_do_push(fifop, (uint8_t *)buf, (n + 3) / 4);
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}
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/**
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* @brief Writes to a TX FIFO fetching data from a queue.
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*
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* @param[in] fifop pointer to the FIFO register
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2013-09-14 10:00:36 +00:00
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* @param[in] oqp pointer to an @p output_queue_t object
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2013-08-04 13:38:53 +00:00
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* @param[in] n maximum number of bytes to copy
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*
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* @notapi
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*/
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static void otg_fifo_write_from_queue(volatile uint32_t *fifop,
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2013-09-14 10:00:36 +00:00
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output_queue_t *oqp,
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2013-08-04 13:38:53 +00:00
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size_t n) {
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size_t ntogo;
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ntogo = n;
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while (ntogo > 0) {
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uint32_t w, i;
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size_t nw = ntogo / 4;
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if (nw > 0) {
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size_t streak;
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uint32_t nw2end = (oqp->q_top - oqp->q_rdptr) / 4;
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ntogo -= (streak = nw <= nw2end ? nw : nw2end) * 4;
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oqp->q_rdptr = otg_do_push(fifop, oqp->q_rdptr, streak);
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if (oqp->q_rdptr >= oqp->q_top) {
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oqp->q_rdptr = oqp->q_buffer;
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continue;
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}
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}
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/* If this condition is not satisfied then there is a word lying across
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queue circular buffer boundary or there are some remaining bytes.*/
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if (ntogo <= 0)
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break;
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/* One byte at time.*/
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w = 0;
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i = 0;
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while ((ntogo > 0) && (i < 4)) {
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w |= (uint32_t)*oqp->q_rdptr++ << (i * 8);
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if (oqp->q_rdptr >= oqp->q_top)
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oqp->q_rdptr = oqp->q_buffer;
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ntogo--;
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i++;
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}
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*fifop = w;
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}
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/* Updating queue.*/
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2013-09-14 10:00:36 +00:00
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osalSysLock();
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2013-08-04 13:38:53 +00:00
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oqp->q_counter += n;
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2013-11-14 10:22:19 +00:00
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osalThreadDequeueAllI(&oqp->q_waiting, Q_OK);
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2013-09-14 10:00:36 +00:00
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osalOsRescheduleS();
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osalSysUnlock();
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2013-08-04 13:38:53 +00:00
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}
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/**
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* @brief Pops a series of words from a FIFO.
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*
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* @param[in] fifop pointer to the FIFO register
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* @param[in] buf pointer to the words buffer, not necessarily word
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* aligned
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* @param[in] n number of words to push
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*
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* @return A pointer after the last word pushed.
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*
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* @notapi
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*/
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static uint8_t *otg_do_pop(volatile uint32_t *fifop, uint8_t *buf, size_t n) {
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while (n > 0) {
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uint32_t w = *fifop;
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/* Note, this line relies on the Cortex-M3/M4 ability to perform
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unaligned word accesses and on the LSB-first memory organization.*/
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*((uint32_t *)buf) = w;
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buf += 4;
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n--;
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}
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return buf;
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}
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/**
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* @brief Reads a packet from the RXFIFO.
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*
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* @param[in] fifop pointer to the FIFO register
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* @param[out] buf buffer where to copy the endpoint data
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* @param[in] n number of bytes to pull from the FIFO
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* @param[in] max number of bytes to copy into the buffer
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*
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* @notapi
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*/
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static void otg_fifo_read_to_buffer(volatile uint32_t *fifop,
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uint8_t *buf,
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size_t n,
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size_t max) {
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n = (n + 3) / 4;
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max = (max + 3) / 4;
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while (n) {
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uint32_t w = *fifop;
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if (max) {
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/* Note, this line relies on the Cortex-M3/M4 ability to perform
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unaligned word accesses and on the LSB-first memory organization.*/
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*((uint32_t *)buf) = w;
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buf += 4;
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max--;
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}
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|
|
|
n--;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Reads a packet from the RXFIFO.
|
|
|
|
*
|
|
|
|
* @param[in] fifop pointer to the FIFO register
|
2013-09-14 10:00:36 +00:00
|
|
|
* @param[in] iqp pointer to an @p input_queue_t object
|
2013-08-04 13:38:53 +00:00
|
|
|
* @param[in] n number of bytes to pull from the FIFO
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
static void otg_fifo_read_to_queue(volatile uint32_t *fifop,
|
2013-09-14 10:00:36 +00:00
|
|
|
input_queue_t *iqp,
|
2013-08-04 13:38:53 +00:00
|
|
|
size_t n) {
|
|
|
|
size_t ntogo;
|
|
|
|
|
|
|
|
ntogo = n;
|
|
|
|
while (ntogo > 0) {
|
|
|
|
uint32_t w, i;
|
|
|
|
size_t nw = ntogo / 4;
|
|
|
|
|
|
|
|
if (nw > 0) {
|
|
|
|
size_t streak;
|
|
|
|
uint32_t nw2end = (iqp->q_wrptr - iqp->q_wrptr) / 4;
|
|
|
|
|
|
|
|
ntogo -= (streak = nw <= nw2end ? nw : nw2end) * 4;
|
|
|
|
iqp->q_wrptr = otg_do_pop(fifop, iqp->q_wrptr, streak);
|
|
|
|
if (iqp->q_wrptr >= iqp->q_top) {
|
|
|
|
iqp->q_wrptr = iqp->q_buffer;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If this condition is not satisfied then there is a word lying across
|
|
|
|
queue circular buffer boundary or there are some remaining bytes.*/
|
|
|
|
if (ntogo <= 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* One byte at time.*/
|
|
|
|
w = *fifop;
|
|
|
|
i = 0;
|
|
|
|
while ((ntogo > 0) && (i < 4)) {
|
|
|
|
*iqp->q_wrptr++ = (uint8_t)(w >> (i * 8));
|
|
|
|
if (iqp->q_wrptr >= iqp->q_top)
|
|
|
|
iqp->q_wrptr = iqp->q_buffer;
|
|
|
|
ntogo--;
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Updating queue.*/
|
2013-09-14 10:00:36 +00:00
|
|
|
osalSysLock();
|
2013-08-04 13:38:53 +00:00
|
|
|
iqp->q_counter += n;
|
2013-11-14 10:22:19 +00:00
|
|
|
osalThreadDequeueAllI(&iqp->q_waiting, Q_OK);
|
2013-09-14 10:00:36 +00:00
|
|
|
osalOsRescheduleS();
|
|
|
|
osalSysUnlock();
|
2013-08-04 13:38:53 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Incoming packets handler.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
static void otg_rxfifo_handler(USBDriver *usbp) {
|
|
|
|
uint32_t sts, cnt, ep;
|
|
|
|
|
|
|
|
sts = usbp->otg->GRXSTSP;
|
|
|
|
switch (sts & GRXSTSP_PKTSTS_MASK) {
|
|
|
|
case GRXSTSP_SETUP_COMP:
|
|
|
|
break;
|
|
|
|
case GRXSTSP_SETUP_DATA:
|
|
|
|
cnt = (sts & GRXSTSP_BCNT_MASK) >> GRXSTSP_BCNT_OFF;
|
|
|
|
ep = (sts & GRXSTSP_EPNUM_MASK) >> GRXSTSP_EPNUM_OFF;
|
|
|
|
otg_fifo_read_to_buffer(usbp->otg->FIFO[0], usbp->epc[ep]->setup_buf,
|
|
|
|
cnt, 8);
|
|
|
|
break;
|
|
|
|
case GRXSTSP_OUT_DATA:
|
|
|
|
cnt = (sts & GRXSTSP_BCNT_MASK) >> GRXSTSP_BCNT_OFF;
|
|
|
|
ep = (sts & GRXSTSP_EPNUM_MASK) >> GRXSTSP_EPNUM_OFF;
|
|
|
|
if (usbp->epc[ep]->out_state->rxqueued) {
|
|
|
|
/* Queue associated.*/
|
|
|
|
otg_fifo_read_to_queue(usbp->otg->FIFO[0],
|
|
|
|
usbp->epc[ep]->out_state->mode.queue.rxqueue,
|
|
|
|
cnt);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
otg_fifo_read_to_buffer(usbp->otg->FIFO[0],
|
|
|
|
usbp->epc[ep]->out_state->mode.linear.rxbuf,
|
|
|
|
cnt,
|
|
|
|
usbp->epc[ep]->out_state->rxsize -
|
|
|
|
usbp->epc[ep]->out_state->rxcnt);
|
|
|
|
usbp->epc[ep]->out_state->mode.linear.rxbuf += cnt;
|
|
|
|
}
|
|
|
|
usbp->epc[ep]->out_state->rxcnt += cnt;
|
|
|
|
break;
|
|
|
|
case GRXSTSP_OUT_GLOBAL_NAK:
|
|
|
|
case GRXSTSP_OUT_COMP:
|
|
|
|
default:
|
|
|
|
;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Outgoing packets handler.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
2013-09-14 10:00:36 +00:00
|
|
|
static bool otg_txfifo_handler(USBDriver *usbp, usbep_t ep) {
|
2013-08-04 13:38:53 +00:00
|
|
|
|
|
|
|
/* The TXFIFO is filled until there is space and data to be transmitted.*/
|
|
|
|
while (TRUE) {
|
|
|
|
uint32_t n;
|
|
|
|
|
|
|
|
/* Transaction end condition.*/
|
|
|
|
if (usbp->epc[ep]->in_state->txcnt >= usbp->epc[ep]->in_state->txsize)
|
|
|
|
return TRUE;
|
|
|
|
|
|
|
|
/* Number of bytes remaining in current transaction.*/
|
|
|
|
n = usbp->epc[ep]->in_state->txsize - usbp->epc[ep]->in_state->txcnt;
|
|
|
|
if (n > usbp->epc[ep]->in_maxsize)
|
|
|
|
n = usbp->epc[ep]->in_maxsize;
|
|
|
|
|
|
|
|
/* Checks if in the TXFIFO there is enough space to accommodate the
|
|
|
|
next packet.*/
|
|
|
|
if (((usbp->otg->ie[ep].DTXFSTS & DTXFSTS_INEPTFSAV_MASK) * 4) < n)
|
|
|
|
return FALSE;
|
|
|
|
|
|
|
|
#if STM32_USB_OTGFIFO_FILL_BASEPRI
|
|
|
|
__set_BASEPRI(CORTEX_PRIORITY_MASK(STM32_USB_OTGFIFO_FILL_BASEPRI));
|
|
|
|
#endif
|
|
|
|
/* Handles the two cases: linear buffer or queue.*/
|
|
|
|
if (usbp->epc[ep]->in_state->txqueued) {
|
|
|
|
/* Queue associated.*/
|
|
|
|
otg_fifo_write_from_queue(usbp->otg->FIFO[ep],
|
|
|
|
usbp->epc[ep]->in_state->mode.queue.txqueue,
|
|
|
|
n);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* Linear buffer associated.*/
|
|
|
|
otg_fifo_write_from_buffer(usbp->otg->FIFO[ep],
|
|
|
|
usbp->epc[ep]->in_state->mode.linear.txbuf,
|
|
|
|
n);
|
|
|
|
usbp->epc[ep]->in_state->mode.linear.txbuf += n;
|
|
|
|
}
|
|
|
|
usbp->epc[ep]->in_state->txcnt += n;
|
|
|
|
}
|
|
|
|
#if STM32_USB_OTGFIFO_FILL_BASEPRI
|
|
|
|
__set_BASEPRI(0);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Generic endpoint IN handler.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
static void otg_epin_handler(USBDriver *usbp, usbep_t ep) {
|
|
|
|
stm32_otg_t *otgp = usbp->otg;
|
|
|
|
uint32_t epint = otgp->ie[ep].DIEPINT;
|
|
|
|
|
|
|
|
otgp->ie[ep].DIEPINT = 0xFFFFFFFF;
|
|
|
|
|
|
|
|
if (epint & DIEPINT_TOC) {
|
|
|
|
/* Timeouts not handled yet, not sure how to handle.*/
|
|
|
|
}
|
|
|
|
if ((epint & DIEPINT_XFRC) && (otgp->DIEPMSK & DIEPMSK_XFRCM)) {
|
|
|
|
/* Transmit transfer complete.*/
|
|
|
|
_usb_isr_invoke_in_cb(usbp, ep);
|
|
|
|
}
|
|
|
|
if ((epint & DIEPINT_TXFE) &&
|
|
|
|
(otgp->DIEPEMPMSK & DIEPEMPMSK_INEPTXFEM(ep))) {
|
|
|
|
/* The thread is made ready, it will be scheduled on ISR exit.*/
|
2013-09-14 10:00:36 +00:00
|
|
|
osalSysLockFromISR();
|
2013-08-04 13:38:53 +00:00
|
|
|
usbp->txpending |= (1 << ep);
|
|
|
|
otgp->DIEPEMPMSK &= ~(1 << ep);
|
2013-09-14 10:00:36 +00:00
|
|
|
osalThreadResumeI(&usbp->wait, MSG_OK);
|
|
|
|
osalSysUnlockFromISR();
|
2013-08-04 13:38:53 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Generic endpoint OUT handler.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
static void otg_epout_handler(USBDriver *usbp, usbep_t ep) {
|
|
|
|
stm32_otg_t *otgp = usbp->otg;
|
|
|
|
uint32_t epint = otgp->oe[ep].DOEPINT;
|
|
|
|
|
|
|
|
/* Resets all EP IRQ sources.*/
|
|
|
|
otgp->oe[ep].DOEPINT = 0xFFFFFFFF;
|
|
|
|
|
|
|
|
if ((epint & DOEPINT_STUP) && (otgp->DOEPMSK & DOEPMSK_STUPM)) {
|
|
|
|
/* Setup packets handling, setup packets are handled using a
|
|
|
|
specific callback.*/
|
|
|
|
_usb_isr_invoke_setup_cb(usbp, ep);
|
|
|
|
|
|
|
|
}
|
|
|
|
if ((epint & DOEPINT_XFRC) && (otgp->DOEPMSK & DOEPMSK_XFRCM)) {
|
|
|
|
/* Receive transfer complete.*/
|
|
|
|
_usb_isr_invoke_out_cb(usbp, ep);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief OTG shared ISR.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
static void usb_lld_serve_interrupt(USBDriver *usbp) {
|
|
|
|
stm32_otg_t *otgp = usbp->otg;
|
|
|
|
uint32_t sts, src;
|
|
|
|
|
|
|
|
sts = otgp->GINTSTS & otgp->GINTMSK;
|
|
|
|
otgp->GINTSTS = sts;
|
|
|
|
|
|
|
|
/* Reset interrupt handling.*/
|
|
|
|
if (sts & GINTSTS_USBRST) {
|
|
|
|
_usb_reset(usbp);
|
|
|
|
_usb_isr_invoke_event_cb(usbp, USB_EVENT_RESET);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enumeration done.*/
|
|
|
|
if (sts & GINTSTS_ENUMDNE) {
|
|
|
|
(void)otgp->DSTS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SOF interrupt handling.*/
|
|
|
|
if (sts & GINTSTS_SOF) {
|
|
|
|
_usb_isr_invoke_sof_cb(usbp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* RX FIFO not empty handling.*/
|
|
|
|
if (sts & GINTSTS_RXFLVL) {
|
|
|
|
/* The interrupt is masked while the thread has control or it would
|
|
|
|
be triggered again.*/
|
2013-09-14 10:00:36 +00:00
|
|
|
osalSysLockFromISR();
|
2013-08-04 13:38:53 +00:00
|
|
|
otgp->GINTMSK &= ~GINTMSK_RXFLVLM;
|
2013-09-14 10:00:36 +00:00
|
|
|
osalThreadResumeI(&usbp->wait, MSG_OK);
|
|
|
|
osalSysUnlockFromISR();
|
2013-08-04 13:38:53 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* IN/OUT endpoints event handling.*/
|
|
|
|
src = otgp->DAINT;
|
|
|
|
if (sts & GINTSTS_IEPINT) {
|
|
|
|
if (src & (1 << 0))
|
|
|
|
otg_epin_handler(usbp, 0);
|
|
|
|
if (src & (1 << 1))
|
|
|
|
otg_epin_handler(usbp, 1);
|
|
|
|
if (src & (1 << 2))
|
|
|
|
otg_epin_handler(usbp, 2);
|
|
|
|
if (src & (1 << 3))
|
|
|
|
otg_epin_handler(usbp, 3);
|
|
|
|
#if STM32_USB_USE_OTG2
|
|
|
|
if (src & (1 << 4))
|
|
|
|
otg_epin_handler(usbp, 4);
|
|
|
|
if (src & (1 << 5))
|
|
|
|
otg_epin_handler(usbp, 5);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
if (sts & GINTSTS_OEPINT) {
|
|
|
|
if (src & (1 << 16))
|
|
|
|
otg_epout_handler(usbp, 0);
|
|
|
|
if (src & (1 << 17))
|
|
|
|
otg_epout_handler(usbp, 1);
|
|
|
|
if (src & (1 << 18))
|
|
|
|
otg_epout_handler(usbp, 2);
|
|
|
|
if (src & (1 << 19))
|
|
|
|
otg_epout_handler(usbp, 3);
|
|
|
|
#if STM32_USB_USE_OTG2
|
|
|
|
if (src & (1 << 20))
|
|
|
|
otg_epout_handler(usbp, 4);
|
|
|
|
if (src & (1 << 21))
|
|
|
|
otg_epout_handler(usbp, 5);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
2013-09-14 10:00:36 +00:00
|
|
|
/* Driver interrupt handlers. */
|
2013-08-04 13:38:53 +00:00
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
|
#if STM32_USB_USE_OTG1 || defined(__DOXYGEN__)
|
|
|
|
#if !defined(STM32_OTG1_HANDLER)
|
|
|
|
#error "STM32_OTG1_HANDLER not defined"
|
|
|
|
#endif
|
|
|
|
/**
|
|
|
|
* @brief OTG1 interrupt handler.
|
|
|
|
*
|
|
|
|
* @isr
|
|
|
|
*/
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_HANDLER(STM32_OTG1_HANDLER) {
|
2013-08-04 13:38:53 +00:00
|
|
|
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_PROLOGUE();
|
2013-08-04 13:38:53 +00:00
|
|
|
|
|
|
|
usb_lld_serve_interrupt(&USBD1);
|
|
|
|
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_EPILOGUE();
|
2013-08-04 13:38:53 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if STM32_USB_USE_OTG2 || defined(__DOXYGEN__)
|
|
|
|
#if !defined(STM32_OTG2_HANDLER)
|
|
|
|
#error "STM32_OTG2_HANDLER not defined"
|
|
|
|
#endif
|
|
|
|
/**
|
|
|
|
* @brief OTG2 interrupt handler.
|
|
|
|
*
|
|
|
|
* @isr
|
|
|
|
*/
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_HANDLER(STM32_OTG2_HANDLER) {
|
2013-08-04 13:38:53 +00:00
|
|
|
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_PROLOGUE();
|
2013-08-04 13:38:53 +00:00
|
|
|
|
|
|
|
usb_lld_serve_interrupt(&USBD2);
|
|
|
|
|
2013-09-14 10:00:36 +00:00
|
|
|
OSAL_IRQ_EPILOGUE();
|
2013-08-04 13:38:53 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*===========================================================================*/
|
|
|
|
/* Driver exported functions. */
|
|
|
|
/*===========================================================================*/
|
|
|
|
|
|
|
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/**
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* @brief Low level USB driver initialization.
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*
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* @notapi
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*/
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void usb_lld_init(void) {
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/* Driver initialization.*/
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#if STM32_USB_USE_OTG1
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usbObjectInit(&USBD1);
|
2013-09-14 10:00:36 +00:00
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USBD1.wait = NULL;
|
2013-08-04 13:38:53 +00:00
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USBD1.otg = OTG_FS;
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USBD1.otgparams = &fsparams;
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#endif
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#if STM32_USB_USE_OTG2
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usbObjectInit(&USBD2);
|
2013-09-14 10:00:36 +00:00
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USBD2.wait = NULL;
|
2013-08-04 13:38:53 +00:00
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USBD2.otg = OTG_HS;
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USBD2.otgparams = &hsparams;
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#endif
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}
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/**
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* @brief Configures and activates the USB peripheral.
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* @note Starting the OTG cell can be a slow operation carried out with
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* interrupts disabled, perform it before starting time-critical
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* operations.
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*
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* @param[in] usbp pointer to the @p USBDriver object
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*
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* @notapi
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*/
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void usb_lld_start(USBDriver *usbp) {
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stm32_otg_t *otgp = usbp->otg;
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if (usbp->state == USB_STOP) {
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/* Clock activation.*/
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#if STM32_USB_USE_OTG1
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if (&USBD1 == usbp) {
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/* OTG FS clock enable and reset.*/
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rccEnableOTG_FS(FALSE);
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rccResetOTG_FS();
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/* Enables IRQ vector.*/
|
2013-09-14 10:00:36 +00:00
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nvicEnableVector(STM32_OTG1_NUMBER, STM32_USB_OTG1_IRQ_PRIORITY);
|
2013-08-04 13:38:53 +00:00
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}
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#endif
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#if STM32_USB_USE_OTG2
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if (&USBD2 == usbp) {
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/* OTG HS clock enable and reset.*/
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rccEnableOTG_HS(FALSE);
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rccResetOTG_HS();
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/* Enables IRQ vector.*/
|
2013-09-14 10:00:36 +00:00
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nvicEnableVector(STM32_OTG2_NUMBER, STM32_USB_OTG2_IRQ_PRIORITY);
|
2013-08-04 13:38:53 +00:00
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}
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#endif
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usbp->txpending = 0;
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/* - Forced device mode.
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- USB turn-around time = TRDT_VALUE.
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- Full Speed 1.1 PHY.*/
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otgp->GUSBCFG = GUSBCFG_FDMOD | GUSBCFG_TRDT(TRDT_VALUE) | GUSBCFG_PHYSEL;
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/* 48MHz 1.1 PHY.*/
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otgp->DCFG = 0x02200000 | DCFG_DSPD_FS11;
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/* PHY enabled.*/
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otgp->PCGCCTL = 0;
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/* Internal FS PHY activation.*/
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otgp->GCCFG = GCCFG_VBUSASEN | GCCFG_VBUSBSEN | GCCFG_PWRDWN;
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/* Soft core reset.*/
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otg_core_reset(usbp);
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/* Interrupts on TXFIFOs half empty.*/
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otgp->GAHBCFG = 0;
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/* Endpoints re-initialization.*/
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otg_disable_ep(usbp);
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/* Clear all pending Device Interrupts, only the USB Reset interrupt
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is required initially.*/
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otgp->DIEPMSK = 0;
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otgp->DOEPMSK = 0;
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otgp->DAINTMSK = 0;
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if (usbp->config->sof_cb == NULL)
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otgp->GINTMSK = GINTMSK_ENUMDNEM | GINTMSK_USBRSTM /*| GINTMSK_USBSUSPM |
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GINTMSK_ESUSPM |*/;
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else
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otgp->GINTMSK = GINTMSK_ENUMDNEM | GINTMSK_USBRSTM /*| GINTMSK_USBSUSPM |
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GINTMSK_ESUSPM */ | GINTMSK_SOFM;
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otgp->GINTSTS = 0xFFFFFFFF; /* Clears all pending IRQs, if any. */
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/* Global interrupts enable.*/
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otgp->GAHBCFG |= GAHBCFG_GINTMSK;
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}
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}
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/**
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* @brief Deactivates the USB peripheral.
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*
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* @param[in] usbp pointer to the @p USBDriver object
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*
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* @notapi
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|
*/
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void usb_lld_stop(USBDriver *usbp) {
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stm32_otg_t *otgp = usbp->otg;
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/* If in ready state then disables the USB clock.*/
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if (usbp->state != USB_STOP) {
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/* Disabling all endpoints in case the driver has been stopped while
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|
active.*/
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otg_disable_ep(usbp);
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usbp->txpending = 0;
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otgp->DAINTMSK = 0;
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otgp->GAHBCFG = 0;
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otgp->GCCFG = 0;
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|
|
#if STM32_USB_USE_USB1
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|
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if (&USBD1 == usbp) {
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nvicDisableVector(STM32_OTG1_NUMBER);
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|
|
rccDisableOTG1(FALSE);
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}
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#endif
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#if STM32_USB_USE_USB2
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if (&USBD2 == usbp) {
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nvicDisableVector(STM32_OTG2_NUMBER);
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|
|
rccDisableOTG2(FALSE);
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|
|
}
|
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|
#endif
|
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}
|
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}
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|
|
/**
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|
|
* @brief USB low level reset routine.
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*
|
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|
* @param[in] usbp pointer to the @p USBDriver object
|
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|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
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|
|
void usb_lld_reset(USBDriver *usbp) {
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|
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unsigned i;
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|
|
stm32_otg_t *otgp = usbp->otg;
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|
/* Flush the Tx FIFO.*/
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|
|
otg_txfifo_flush(usbp, 0);
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|
/* All endpoints in NAK mode, interrupts cleared.*/
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|
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for (i = 0; i <= usbp->otgparams->num_endpoints; i++) {
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|
otgp->ie[i].DIEPCTL = DIEPCTL_SNAK;
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|
otgp->oe[i].DOEPCTL = DOEPCTL_SNAK;
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|
otgp->ie[i].DIEPINT = 0xFF;
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|
otgp->oe[i].DOEPINT = 0xFF;
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|
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|
}
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|
/* Endpoint interrupts all disabled and cleared.*/
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|
|
otgp->DAINT = 0xFFFFFFFF;
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|
otgp->DAINTMSK = DAINTMSK_OEPM(0) | DAINTMSK_IEPM(0);
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/* Resets the FIFO memory allocator.*/
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|
otg_ram_reset(usbp);
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/* Receive FIFO size initialization, the address is always zero.*/
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otgp->GRXFSIZ = usbp->otgparams->rx_fifo_size;
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|
otg_rxfifo_flush(usbp);
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/* Resets the device address to zero.*/
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|
otgp->DCFG = (otgp->DCFG & ~DCFG_DAD_MASK) | DCFG_DAD(0);
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/* Enables also EP-related interrupt sources.*/
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|
otgp->GINTMSK |= GINTMSK_RXFLVLM | GINTMSK_OEPM | GINTMSK_IEPM;
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|
otgp->DIEPMSK = DIEPMSK_TOCM | DIEPMSK_XFRCM;
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otgp->DOEPMSK = DOEPMSK_STUPM | DOEPMSK_XFRCM;
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/* EP0 initialization, it is a special case.*/
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|
usbp->epc[0] = &ep0config;
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|
otgp->oe[0].DOEPTSIZ = 0;
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otgp->oe[0].DOEPCTL = DOEPCTL_SD0PID | DOEPCTL_USBAEP | DOEPCTL_EPTYP_CTRL |
|
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|
DOEPCTL_MPSIZ(ep0config.out_maxsize);
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otgp->ie[0].DIEPTSIZ = 0;
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otgp->ie[0].DIEPCTL = DIEPCTL_SD0PID | DIEPCTL_USBAEP | DIEPCTL_EPTYP_CTRL |
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DIEPCTL_TXFNUM(0) | DIEPCTL_MPSIZ(ep0config.in_maxsize);
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|
otgp->DIEPTXF0 = DIEPTXF_INEPTXFD(ep0config.in_maxsize / 4) |
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DIEPTXF_INEPTXSA(otg_ram_alloc(usbp,
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|
|
ep0config.in_maxsize / 4));
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}
|
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|
/**
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* @brief Sets the USB address.
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*
|
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* @param[in] usbp pointer to the @p USBDriver object
|
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*
|
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|
* @notapi
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|
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|
*/
|
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|
void usb_lld_set_address(USBDriver *usbp) {
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|
|
stm32_otg_t *otgp = usbp->otg;
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|
|
otgp->DCFG = (otgp->DCFG & ~DCFG_DAD_MASK) | DCFG_DAD(usbp->address);
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|
}
|
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|
|
/**
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* @brief Enables an endpoint.
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|
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|
*
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* @param[in] usbp pointer to the @p USBDriver object
|
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|
* @param[in] ep endpoint number
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|
*
|
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|
|
* @notapi
|
|
|
|
*/
|
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|
|
void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) {
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uint32_t ctl, fsize;
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|
stm32_otg_t *otgp = usbp->otg;
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/* IN and OUT common parameters.*/
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switch (usbp->epc[ep]->ep_mode & USB_EP_MODE_TYPE) {
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case USB_EP_MODE_TYPE_CTRL:
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ctl = DIEPCTL_SD0PID | DIEPCTL_USBAEP | DIEPCTL_EPTYP_CTRL;
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|
break;
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case USB_EP_MODE_TYPE_ISOC:
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ctl = DIEPCTL_SD0PID | DIEPCTL_USBAEP | DIEPCTL_EPTYP_ISO;
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|
break;
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case USB_EP_MODE_TYPE_BULK:
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ctl = DIEPCTL_SD0PID | DIEPCTL_USBAEP | DIEPCTL_EPTYP_BULK;
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|
break;
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case USB_EP_MODE_TYPE_INTR:
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ctl = DIEPCTL_SD0PID | DIEPCTL_USBAEP | DIEPCTL_EPTYP_INTR;
|
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|
|
break;
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default:
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return;
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|
|
}
|
|
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|
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|
|
/* OUT endpoint activation or deactivation.*/
|
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|
|
otgp->oe[ep].DOEPTSIZ = 0;
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|
|
if (usbp->epc[ep]->out_cb != NULL) {
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|
|
otgp->oe[ep].DOEPCTL = ctl | DOEPCTL_MPSIZ(usbp->epc[ep]->out_maxsize);
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|
otgp->DAINTMSK |= DAINTMSK_OEPM(ep);
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|
}
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|
else {
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|
otgp->oe[ep].DOEPCTL &= ~DOEPCTL_USBAEP;
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|
|
otgp->DAINTMSK &= ~DAINTMSK_OEPM(ep);
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|
}
|
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|
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|
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/* IN endpoint activation or deactivation.*/
|
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|
|
otgp->ie[ep].DIEPTSIZ = 0;
|
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|
|
if (usbp->epc[ep]->in_cb != NULL) {
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|
|
/* FIFO allocation for the IN endpoint.*/
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fsize = usbp->epc[ep]->in_maxsize / 4;
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|
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if (usbp->epc[ep]->in_multiplier > 1)
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|
|
fsize *= usbp->epc[ep]->in_multiplier;
|
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|
|
otgp->DIEPTXF[ep - 1] = DIEPTXF_INEPTXFD(fsize) |
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|
|
DIEPTXF_INEPTXSA(otg_ram_alloc(usbp, fsize));
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|
|
otg_txfifo_flush(usbp, ep);
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otgp->ie[ep].DIEPCTL = ctl |
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|
DIEPCTL_TXFNUM(ep) |
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|
|
DIEPCTL_MPSIZ(usbp->epc[ep]->in_maxsize);
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|
|
otgp->DAINTMSK |= DAINTMSK_IEPM(ep);
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|
|
}
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|
else {
|
|
|
|
otgp->DIEPTXF[ep - 1] = 0x02000400; /* Reset value.*/
|
|
|
|
otg_txfifo_flush(usbp, ep);
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|
|
otgp->ie[ep].DIEPCTL &= ~DIEPCTL_USBAEP;
|
|
|
|
otgp->DAINTMSK &= ~DAINTMSK_IEPM(ep);
|
|
|
|
}
|
|
|
|
}
|
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|
|
|
|
|
|
/**
|
|
|
|
* @brief Disables all the active endpoints except the endpoint zero.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_disable_endpoints(USBDriver *usbp) {
|
|
|
|
|
|
|
|
/* Resets the FIFO memory allocator.*/
|
|
|
|
otg_ram_reset(usbp);
|
|
|
|
|
|
|
|
/* Disabling all endpoints.*/
|
|
|
|
otg_disable_ep(usbp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Returns the status of an OUT endpoint.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
* @return The endpoint status.
|
|
|
|
* @retval EP_STATUS_DISABLED The endpoint is not active.
|
|
|
|
* @retval EP_STATUS_STALLED The endpoint is stalled.
|
|
|
|
* @retval EP_STATUS_ACTIVE The endpoint is active.
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) {
|
|
|
|
uint32_t ctl;
|
|
|
|
|
|
|
|
(void)usbp;
|
|
|
|
|
|
|
|
ctl = usbp->otg->oe[ep].DOEPCTL;
|
|
|
|
if (!(ctl & DOEPCTL_USBAEP))
|
|
|
|
return EP_STATUS_DISABLED;
|
|
|
|
if (ctl & DOEPCTL_STALL)
|
|
|
|
return EP_STATUS_STALLED;
|
|
|
|
return EP_STATUS_ACTIVE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Returns the status of an IN endpoint.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
* @return The endpoint status.
|
|
|
|
* @retval EP_STATUS_DISABLED The endpoint is not active.
|
|
|
|
* @retval EP_STATUS_STALLED The endpoint is stalled.
|
|
|
|
* @retval EP_STATUS_ACTIVE The endpoint is active.
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) {
|
|
|
|
uint32_t ctl;
|
|
|
|
|
|
|
|
(void)usbp;
|
|
|
|
|
|
|
|
ctl = usbp->otg->ie[ep].DIEPCTL;
|
|
|
|
if (!(ctl & DIEPCTL_USBAEP))
|
|
|
|
return EP_STATUS_DISABLED;
|
|
|
|
if (ctl & DIEPCTL_STALL)
|
|
|
|
return EP_STATUS_STALLED;
|
|
|
|
return EP_STATUS_ACTIVE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Reads a setup packet from the dedicated packet buffer.
|
|
|
|
* @details This function must be invoked in the context of the @p setup_cb
|
|
|
|
* callback in order to read the received setup packet.
|
|
|
|
* @pre In order to use this function the endpoint must have been
|
|
|
|
* initialized as a control endpoint.
|
|
|
|
* @post The endpoint is ready to accept another packet.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
* @param[out] buf buffer where to copy the packet data
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf) {
|
|
|
|
|
|
|
|
memcpy(buf, usbp->epc[ep]->setup_buf, 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Prepares for a receive operation.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_prepare_receive(USBDriver *usbp, usbep_t ep) {
|
|
|
|
uint32_t pcnt;
|
|
|
|
USBOutEndpointState *osp = usbp->epc[ep]->out_state;
|
|
|
|
|
|
|
|
/* Transfer initialization.*/
|
|
|
|
pcnt = (osp->rxsize + usbp->epc[ep]->out_maxsize - 1) /
|
|
|
|
usbp->epc[ep]->out_maxsize;
|
|
|
|
usbp->otg->oe[ep].DOEPTSIZ = DOEPTSIZ_STUPCNT(3) | DOEPTSIZ_PKTCNT(pcnt) |
|
|
|
|
DOEPTSIZ_XFRSIZ(usbp->epc[ep]->out_maxsize);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Prepares for a transmit operation.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_prepare_transmit(USBDriver *usbp, usbep_t ep) {
|
|
|
|
USBInEndpointState *isp = usbp->epc[ep]->in_state;
|
|
|
|
|
|
|
|
/* Transfer initialization.*/
|
|
|
|
if (isp->txsize == 0) {
|
|
|
|
/* Special case, sending zero size packet.*/
|
|
|
|
usbp->otg->ie[ep].DIEPTSIZ = DIEPTSIZ_PKTCNT(1) | DIEPTSIZ_XFRSIZ(0);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
/* Normal case.*/
|
|
|
|
uint32_t pcnt = (isp->txsize + usbp->epc[ep]->in_maxsize - 1) /
|
|
|
|
usbp->epc[ep]->in_maxsize;
|
|
|
|
usbp->otg->ie[ep].DIEPTSIZ = DIEPTSIZ_PKTCNT(pcnt) |
|
|
|
|
DIEPTSIZ_XFRSIZ(usbp->epc[ep]->in_state->txsize);
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Starts a receive operation on an OUT endpoint.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_start_out(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->oe[ep].DOEPCTL |= DOEPCTL_CNAK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Starts a transmit operation on an IN endpoint.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_start_in(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->ie[ep].DIEPCTL |= DIEPCTL_EPENA | DIEPCTL_CNAK;
|
|
|
|
usbp->otg->DIEPEMPMSK |= DIEPEMPMSK_INEPTXFEM(ep);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Brings an OUT endpoint in the stalled state.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_stall_out(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->oe[ep].DOEPCTL |= DOEPCTL_STALL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Brings an IN endpoint in the stalled state.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_stall_in(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->ie[ep].DIEPCTL |= DIEPCTL_STALL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Brings an OUT endpoint in the active state.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_clear_out(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->oe[ep].DOEPCTL &= ~DOEPCTL_STALL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Brings an IN endpoint in the active state.
|
|
|
|
*
|
|
|
|
* @param[in] usbp pointer to the @p USBDriver object
|
|
|
|
* @param[in] ep endpoint number
|
|
|
|
*
|
|
|
|
* @notapi
|
|
|
|
*/
|
|
|
|
void usb_lld_clear_in(USBDriver *usbp, usbep_t ep) {
|
|
|
|
|
|
|
|
usbp->otg->ie[ep].DIEPCTL &= ~DIEPCTL_STALL;
|
|
|
|
}
|
|
|
|
|
2013-09-14 10:00:36 +00:00
|
|
|
/**
|
|
|
|
* @brief USB data transfer loop.
|
|
|
|
* @details This function must be executed by a system thread in order to
|
|
|
|
* make the USB driver work.
|
|
|
|
* @note The data copy part of the driver is implemented in this thread
|
|
|
|
* in order to not perform heavy tasks withing interrupt handlers.
|
|
|
|
*
|
|
|
|
* @param[in] p pointer to the @p USBDriver object
|
|
|
|
* @return The function never returns.
|
|
|
|
*
|
|
|
|
* @special
|
|
|
|
*/
|
|
|
|
msg_t usb_lld_pump(void *p) {
|
|
|
|
USBDriver *usbp = (USBDriver *)p;
|
|
|
|
stm32_otg_t *otgp = usbp->otg;
|
|
|
|
|
|
|
|
#if defined(__CHIBIOS_RT__)
|
|
|
|
chRegSetThreadName("usb_lld_pump");
|
|
|
|
#endif
|
|
|
|
osalSysLock();
|
|
|
|
while (true) {
|
|
|
|
usbep_t ep;
|
|
|
|
uint32_t epmask;
|
|
|
|
|
|
|
|
/* Nothing to do, going to sleep.*/
|
|
|
|
if ((usbp->state == USB_STOP) ||
|
|
|
|
((usbp->txpending == 0) && !(otgp->GINTSTS & GINTSTS_RXFLVL))) {
|
|
|
|
otgp->GINTMSK |= GINTMSK_RXFLVLM;
|
|
|
|
osalThreadSuspendS(&usbp->wait);
|
|
|
|
}
|
|
|
|
osalSysUnlock();
|
|
|
|
|
|
|
|
/* Checks if there are TXFIFOs to be filled.*/
|
|
|
|
for (ep = 0; ep <= usbp->otgparams->num_endpoints; ep++) {
|
|
|
|
|
|
|
|
/* Empties the RX FIFO.*/
|
|
|
|
while (otgp->GINTSTS & GINTSTS_RXFLVL) {
|
|
|
|
otg_rxfifo_handler(usbp);
|
|
|
|
}
|
|
|
|
|
|
|
|
epmask = (1 << ep);
|
|
|
|
if (usbp->txpending & epmask) {
|
|
|
|
bool done;
|
|
|
|
|
|
|
|
osalSysLock();
|
|
|
|
/* USB interrupts are globally *suspended* because the peripheral
|
|
|
|
does not allow any interference during the TX FIFO filling
|
|
|
|
operation.
|
|
|
|
Synopsys document: DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
|
|
|
|
"The application has to finish writing one complete packet before
|
|
|
|
switching to a different channel/endpoint FIFO. Violating this
|
|
|
|
rule results in an error.".*/
|
|
|
|
otgp->GAHBCFG &= ~GAHBCFG_GINTMSK;
|
|
|
|
usbp->txpending &= ~epmask;
|
|
|
|
osalSysUnlock();
|
|
|
|
|
|
|
|
done = otg_txfifo_handler(usbp, ep);
|
|
|
|
|
|
|
|
osalSysLock();
|
|
|
|
otgp->GAHBCFG |= GAHBCFG_GINTMSK;
|
|
|
|
if (!done)
|
|
|
|
otgp->DIEPEMPMSK |= epmask;
|
|
|
|
osalSysUnlock();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
osalSysLock();
|
|
|
|
}
|
|
|
|
osalSysUnlock();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-08-04 13:38:53 +00:00
|
|
|
#endif /* HAL_USE_USB */
|
|
|
|
|
|
|
|
/** @} */
|