2011-04-26 16:59:14 +00:00
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2012-03-05 16:44:56 +00:00
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2011 Giovanni Di Sirio.
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2011-04-26 16:59:14 +00:00
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file sdc.h
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* @brief SDC Driver macros and structures.
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*
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* @addtogroup SDC
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* @{
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*/
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#ifndef _SDC_H_
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#define _SDC_H_
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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2011-05-02 15:23:50 +00:00
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#define SDC_BLOCK_SIZE 512 /**< Fixed block size. */
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2011-05-01 09:10:22 +00:00
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2011-05-10 18:33:49 +00:00
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/**
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* @brief Fixed pattern for CMD8.
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*/
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#define SDC_CMD8_PATTERN 0x000001AA
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2011-08-23 13:36:25 +00:00
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/**
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* @name SD cart types
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* @{
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*/
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2011-05-10 18:33:49 +00:00
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#define SDC_MODE_CARDTYPE_MASK 0xF /**< @brief Card type mask. */
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#define SDC_MODE_CARDTYPE_SDV11 0 /**< @brief Card is SD V1.1.*/
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#define SDC_MODE_CARDTYPE_SDV20 1 /**< @brief Card is SD V2.0.*/
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#define SDC_MODE_CARDTYPE_MMC 2 /**< @brief Card is MMC. */
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#define SDC_MODE_HIGH_CAPACITY 0x10 /**< @brief High cap.card. */
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2011-08-23 13:36:25 +00:00
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/** @} */
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2011-05-10 18:33:49 +00:00
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/**
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* @brief Mask of error bits in R1 responses.
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*/
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#define SDC_R1_ERROR_MASK 0xFDFFE008
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#define SDC_STS_IDLE 0
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#define SDC_STS_READY 1
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#define SDC_STS_IDENT 2
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#define SDC_STS_STBY 3
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#define SDC_STS_TRAN 4
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#define SDC_STS_DATA 5
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#define SDC_STS_RCV 6
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#define SDC_STS_PRG 7
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#define SDC_STS_DIS 8
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_GO_IDLE_STATE 0
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2011-05-10 18:33:49 +00:00
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#define SDC_CMD_INIT 1
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_ALL_SEND_CID 2
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#define SDC_CMD_SEND_RELATIVE_ADDR 3
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2011-05-09 17:54:23 +00:00
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#define SDC_CMD_SET_BUS_WIDTH 6
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_SEL_DESEL_CARD 7
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#define SDC_CMD_SEND_IF_COND 8
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#define SDC_CMD_SEND_CSD 9
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#define SDC_CMD_STOP_TRANSMISSION 12
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2011-05-09 19:30:55 +00:00
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#define SDC_CMD_SEND_STATUS 13
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_SET_BLOCKLEN 16
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2011-05-29 09:09:22 +00:00
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#define SDC_CMD_READ_SINGLE_BLOCK 17
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_READ_MULTIPLE_BLOCK 18
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2011-05-07 13:24:04 +00:00
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#define SDC_CMD_SET_BLOCK_COUNT 23
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2011-05-29 09:09:22 +00:00
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#define SDC_CMD_WRITE_BLOCK 24
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_WRITE_MULTIPLE_BLOCK 25
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#define SDC_CMD_APP_OP_COND 41
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2011-05-10 18:33:49 +00:00
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#define SDC_CMD_LOCK_UNLOCK 42
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2011-05-02 15:23:50 +00:00
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#define SDC_CMD_APP_CMD 55
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2011-05-01 09:10:22 +00:00
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Returning status.
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*/
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#define SDC_SUCCESS FALSE
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#define SDC_FAILED TRUE
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/**
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* @name SDC bus error conditions
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* @{
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*/
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#define SDC_NO_ERROR 0 /**< @brief No error. */
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#define SDC_CMD_CRC_ERROR 1 /**< @brief Command CRC error. */
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#define SDC_DATA_CRC_ERROR 2 /**< @brief Data CRC error. */
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#define SDC_DATA_TIMEOUT 4 /**< @brief Hardware write timeout.*/
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#define SDC_COMMAND_TIMEOUT 8 /**< @brief Hardware read timeout. */
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#define SDC_TX_UNDERRUN 16 /**< @brief TX buffer underrun. */
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#define SDC_RX_OVERRUN 32 /**< @brief RX buffer overrun. */
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#define SDC_STARTBIT_ERROR 64 /**< @brief Start bit not detected.*/
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#define SDC_OVERFLOW_ERROR 128 /**< @brief Card overflow error. */
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#define SDC_UNHANDLED_ERROR 0xFFFFFFFF
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2011-04-26 16:59:14 +00:00
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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2011-08-23 13:36:25 +00:00
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/**
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* @name SDC configuration options
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* @{
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*/
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2011-05-10 18:33:49 +00:00
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/**
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* @brief Number of initialization attempts before rejecting the card.
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* @note Attempts are performed at 10mS intevals.
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*/
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#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
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#define SDC_INIT_RETRY 100
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#endif
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/**
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* @brief Include support for MMC cards.
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* @note MMC support is not yet implemented so this option must be kept
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* at @p FALSE.
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*/
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#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
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#define SDC_MMC_SUPPORT FALSE
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#endif
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/**
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* @brief Delays insertions.
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* @details If enabled this options inserts delays into the MMC waiting
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* routines releasing some extra CPU time for the threads with
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* lower priority, this may slow down the driver a bit however.
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*/
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#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
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#define SDC_NICE_WAITING TRUE
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#endif
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Write timeout in milliseconds.
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*/
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#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
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#define SDC_WRITE_TIMEOUT_MS 250
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#endif
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/**
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* @brief Write timeout in milliseconds.
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*/
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#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
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#define SDC_READ_TIMEOUT_MS 5
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#endif
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2011-08-23 13:36:25 +00:00
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/** @} */
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2011-05-10 18:33:49 +00:00
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2011-04-26 16:59:14 +00:00
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Driver state machine possible states.
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*/
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typedef enum {
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SDC_UNINIT = 0, /**< Not initialized. */
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SDC_STOP = 1, /**< Stopped. */
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SDC_READY = 2, /**< Ready. */
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2011-05-10 18:33:49 +00:00
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SDC_CONNECTING = 3, /**< Card connection in progress. */
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SDC_DISCONNECTING = 4, /**< Card disconnection in progress. */
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SDC_ACTIVE = 5, /**< Cart initialized. */
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SDC_READING = 6, /**< Read operation in progress. */
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SDC_WRITING = 7, /**< Write operation in progress. */
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2011-04-26 16:59:14 +00:00
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} sdcstate_t;
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#include "sdc_lld.h"
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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2011-08-23 13:36:25 +00:00
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/**
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* @name R1 response utilities
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* @{
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*/
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2011-05-10 18:33:49 +00:00
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/**
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* @brief Evaluates to @p TRUE if the R1 response contains error flags.
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*
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* @param[in] r1 the r1 response
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*/
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#define SDC_R1_ERROR(r1) (((r1) & SDC_R1_ERROR_MASK) != 0)
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/**
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* @brief Returns the status field of an R1 response.
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*
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* @param[in] r1 the r1 response
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*/
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#define SDC_R1_STS(r1) (((r1) >> 9) & 15)
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/**
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* @brief Evaluates to @p TRUE if the R1 response indicates a locked card.
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*
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* @param[in] r1 the r1 response
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*/
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#define SDC_R1_IS_CARD_LOCKED(r1) (((r1) >> 21) & 1)
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2011-08-23 13:36:25 +00:00
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/** @} */
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2011-05-10 18:33:49 +00:00
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2011-08-23 13:36:25 +00:00
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/**
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* @name Macro Functions
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* @{
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*/
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2011-05-29 16:19:21 +00:00
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/**
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* @brief Returns the driver state.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @return The driver state.
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*
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* @api
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*/
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#define sdcGetDriverState(sdcp) ((sdcp)->state)
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2011-06-04 13:30:13 +00:00
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/**
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* @brief Returns the card insertion status.
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* @note This macro wraps a low level function named
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* @p sdc_lld_is_card_inserted(), this function must be
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* provided by the application because it is not part of the
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* SDC driver.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @return The card state.
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* @retval FALSE card not inserted.
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* @retval TRUE card inserted.
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*
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* @api
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*/
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#define sdcIsCardInserted(sdcp) (sdc_lld_is_card_inserted(sdcp))
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2011-05-29 16:19:21 +00:00
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/**
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* @brief Returns the write protect status.
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* @note This macro wraps a low level function named
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* @p sdc_lld_is_write_protected(), this function must be
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* provided by the application because it is not part of the
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* SDC driver.
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*
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* @param[in] sdcp pointer to the @p SDCDriver object
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* @return The card state.
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* @retval FALSE card not inserted.
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* @retval TRUE card inserted.
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*
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* @api
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*/
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#define sdcIsWriteProtected(sdcp) (sdc_lld_is_write_protected(sdcp))
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2012-03-05 16:44:56 +00:00
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/**
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* @brief Slice position of values in CSD register.
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*/
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/* CSD version 1.0 */
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#define SDC_CSD_20_CRC_SLICE 7,1
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#define SDC_CSD_20_FILE_FORMAT_SLICE 11,10
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#define SDC_CSD_20_TMP_WRITE_PROTECT_SLICE 12,12
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#define SDC_CSD_20_PERM_WRITE_PROTECT_SLICE 13,13
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#define SDC_CSD_20_COPY_SLICE 14,14
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#define SDC_CSD_20_FILE_FORMAT_GRP_SLICE 15,15
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#define SDC_CSD_20_WRITE_BL_PARTIAL_SLICE 21,21
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#define SDC_CSD_20_WRITE_BL_LEN_SLICE 25,12
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#define SDC_CSD_20_R2W_FACTOR_SLICE 28,26
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#define SDC_CSD_20_WP_GRP_ENABLE_SLICE 31,31
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#define SDC_CSD_20_WP_GRP_SIZE_SLICE 38,32
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#define SDC_CSD_20_ERASE_SECTOR_SIZE_SLICE 45,39
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#define SDC_CSD_20_ERASE_BLK_EN_SLICE 46,46
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#define SDC_CSD_20_C_SIZE_SLICE 69,48
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#define SDC_CSD_20_DSR_IMP_SLICE 76,76
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#define SDC_CSD_20_READ_BLK_MISALIGN_SLICE 77,77
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#define SDC_CSD_20_WRITE_BLK_MISALIGN_SLICE 78,78
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#define SDC_CSD_20_READ_BL_PARTIAL_SLICE 79,79
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#define SDC_CSD_20_READ_BL_LEN_SLICE 83,80
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#define SDC_CSD_20_CCC_SLICE 95,84
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#define SDC_CSD_20_TRANS_SPEED_SLICE 103,96
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#define SDC_CSD_20_NSAC_SLICE 111,104
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#define SDC_CSD_20_TAAC_SLICE 119,112
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#define SDC_CSD_20_STRUCTURE_SLICE 127,126
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/* CSD version 2.0 */
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#define SDC_CSD_10_CRC_SLICE SDC_CSD_20_CRC_SLICE
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#define SDC_CSD_10_FILE_FORMAT_SLICE SDC_CSD_20_FILE_FORMAT_SLICE
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#define SDC_CSD_10_TMP_WRITE_PROTECT_SLICE SDC_CSD_20_TMP_WRITE_PROTECT_SLICE
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#define SDC_CSD_10_PERM_WRITE_PROTECT_SLICE SDC_CSD_20_PERM_WRITE_PROTECT_SLICE
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#define SDC_CSD_10_COPY_SLICE SDC_CSD_20_COPY_SLICE
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#define SDC_CSD_10_FILE_FORMAT_GRP_SLICE SDC_CSD_20_FILE_FORMAT_GRP_SLICE
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#define SDC_CSD_10_WRITE_BL_PARTIAL_SLICE SDC_CSD_20_WRITE_BL_PARTIAL_SLICE
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#define SDC_CSD_10_WRITE_BL_LEN_SLICE SDC_CSD_20_WRITE_BL_LEN_SLICE
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#define SDC_CSD_10_R2W_FACTOR_SLICE SDC_CSD_20_R2W_FACTOR_SLICE
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#define SDC_CSD_10_WP_GRP_ENABLE_SLICE SDC_CSD_20_WP_GRP_ENABLE_SLICE
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#define SDC_CSD_10_WP_GRP_SIZE_SLICE SDC_CSD_20_WP_GRP_SIZE_SLICE
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#define SDC_CSD_10_ERASE_SECTOR_SIZE_SLICE SDC_CSD_20_ERASE_SECTOR_SIZE_SLICE
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#define SDC_CSD_10_ERASE_BLK_EN_SLICE SDC_CSD_20_ERASE_BLK_EN_SLICE
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#define SDC_CSD_10_C_SIZE_MULT_SLICE 49,47
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#define SDC_CSD_10_VDD_W_CURR_MAX_SLICE 52,50
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#define SDC_CSD_10_VDD_W_CURR_MIN_SLICE 55,53
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#define SDC_CSD_10_VDD_R_CURR_MAX_SLICE 58,56
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#define SDC_CSD_10_VDD_R_CURR_MIX_SLICE 61,59
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#define SDC_CSD_10_C_SIZE_SLICE 73,62
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#define SDC_CSD_10_DSR_IMP_SLICE SDC_CSD_20_DSR_IMP_SLICE
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#define SDC_CSD_10_READ_BLK_MISALIGN_SLICE SDC_CSD_20_READ_BLK_MISALIGN_SLICE
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#define SDC_CSD_10_WRITE_BLK_MISALIGN_SLICE SDC_CSD_20_WRITE_BLK_MISALIGN_SLICE
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#define SDC_CSD_10_READ_BL_PARTIAL_SLICE SDC_CSD_20_READ_BL_PARTIAL_SLICE
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#define SDC_CSD_10_READ_BL_LEN_SLICE 83, 80
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#define SDC_CSD_10_CCC_SLICE SDC_CSD_20_CCC_SLICE
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#define SDC_CSD_10_TRANS_SPEED_SLICE SDC_CSD_20_TRANS_SPEED_SLICE
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#define SDC_CSD_10_NSAC_SLICE SDC_CSD_20_NSAC_SLICE
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#define SDC_CSD_10_TAAC_SLICE SDC_CSD_20_TAAC_SLICE
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#define SDC_CSD_10_STRUCTURE_SLICE SDC_CSD_20_STRUCTURE_SLICE
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2011-08-23 13:36:25 +00:00
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/** @} */
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2011-05-29 16:19:21 +00:00
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2011-04-26 16:59:14 +00:00
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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void sdcInit(void);
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void sdcObjectInit(SDCDriver *sdcp);
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void sdcStart(SDCDriver *sdcp, const SDCConfig *config);
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void sdcStop(SDCDriver *sdcp);
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bool_t sdcConnect(SDCDriver *sdcp);
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bool_t sdcDisconnect(SDCDriver *sdcp);
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bool_t sdcRead(SDCDriver *sdcp, uint32_t startblk,
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uint8_t *buffer, uint32_t n);
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bool_t sdcWrite(SDCDriver *sdcp, uint32_t startblk,
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const uint8_t *buffer, uint32_t n);
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2011-08-28 08:53:14 +00:00
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bool_t _sdc_wait_for_transfer_state(SDCDriver *sdcp);
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2011-04-26 16:59:14 +00:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SDC */
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#endif /* _SDC_H_ */
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/** @} */
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