ignore submodule for diff

Add download link to schematics
Add the additional packages for DATV application
2021-06-18 09:17:37 +08:00 · 2021-06-18 09:07:19 +08:00 · 2021-06-18 08:54:35 +08:00 · 2021-06-17 23:21:38 +08:00 · 2021-06-17 20:30:29 +08:00 · 2021-06-17 18:06:51 +08:00
20 changed files with 311 additions and 320 deletions
--- a/README.md
+++ b/README.md
@ -0,0 +1,129 @@
+# Pluto+
+The repo maintain the firmware of Pluto+. Pluto+ is a software-defined radio platform that supports 2TX 2RX, supports Gigabit Ethernet and Micro SD card. The design inherited from the well-known ADI ADALM-PLUTO with several improvements.
+
+[TOC]
+
+## Specification
+
+| Feature     | Details                                                      |
+| ----------- | ------------------------------------------------------------ |
+| SOC         | Zynq7zc010 with 28k LUTs                                     |
+| ADC/DAC     | AD9363(Can hack to AD9361 or AD9364)  with 2 Transmit, 2 Receive channel |
+| RF Range    | 70MHZ~6GHZ                                                   |
+| Ref Clock   | VCTCXO 40MHZ 0.5ppm, with external clock input               |
+| RAM         | 512MB                                                        |
+| FLASH       | 32MB, SD Card                                                |
+| Connections | USB：2.0  support OTG                                        |
+|             | Ethernet：1Gb                                                |
+| DC IN       | 5V +-0.5V-2A microUSB                                        |
+
+![Front](./images/clip_image002.jpg)
+
+![Back](./images/clip_image003.jpg)
+
+### Schematics
+
+Pluto+ has full schematics open sourced. You can find this in sch folder.
+
+[Download Schematics](./sch/PLUTOX_SDR-V1.0-20201212.pdf)
+
+[Download Top View](./sch/Top.pdf)
+
+[Download Bottom View](./sch/Bottom.pdf)
+
+## How to upgrade the firmware
+
+### UDisk Upgrade
+
+1. You can download the latest firmware from here
+2. Unzip the files
+3. Put *.frm files into the storage disk named "PlutoSDR"
+
+### DFU Upgrade
+If you device is not responding anymore, you have to apply DFU procedure to unbrick it.
+1. Download the firmware and unzip it.
+
+2. Install dfu utility
+
+5. Make Device enter DFU mode. There is a howto section below on the details steps.
+   
+4. Run DFU utility with the following command:
+
+   ```
+   dfu-tool -a 0 -write boot.dfu
+   dfu-tool -a 1 -write pluto.dfu
+   ```
+
+## How to build firmware manually
+1. Clone this repo
+2. Download the source code via 'git submodule update --init'
+3. Apply the diff to each subfolder
+   ```
+   cd plutosdr-fw
+   git apply ../patches/fw.diff
+   
+   cd hdl
+   git apply ../../hdl.diff
+   cd ..
+   
+   cd linux
+   git apply ../../linux.diff
+   cd ..
+   
+   cd u-boot-xlnx
+   git apply ../../u-boot-xlnx.diff
+   cd ..
+   
+   ```
+4. Build the code via 'make' in plutosdr-fw folder
+
+In case you hit the error, please search the internet on PlutoSDR firmware build. It is identical.
+
+## Jumpers and Pinouts
+
+There is description on PCB on the jumpers.
+
+![Jumpers](./images/jumpers.jpg)
+
+*Please note that all IO levels are 1.8V.*
+
+1. When using the official ADI-PlutoSDR firmware, please connect to URST-MI052.
+2. When using Pluto+ firmware and need to support Ethernet, please connect URST-MIO46
+3. When using SD card to boot, please connect SD-H to 1V8
+4. When using JTAG to debug, please connect JTAG# to GND
+5. Please connect EXCLK to GND when using external reference clock input
+
+## HowTo
+
+### How to connect PTT
+
+PTT drives optocouplers through GPIO0 (MI00), which requires an external relay or control circuit.
+
+![ptt_sch](./images/PTT_SCH.jpg)
+
+![ptt](./images/ptt.jpg)
+
+### How to Enter DFU
+
+1. Remove the screws and open up the device.
+2. Short URST with MIO52, see the Jumper images for details.
+3. Press DFU while power the device
+
+![img](./images/dfu.jpg)
+
+### How to have a external reference clock
+
+You can connect a cable to input an external high-precision reference clock for AD9363 through the IPEX interface.
+The main level should not exceed **3.3V**, and the EXCLK jumper needs to be connected to GND to turn off the built-in clock. (Check Jumper image for details)
+
+![img](./images/ref.jpg)
+
+![img](./images/ref_sch.jpg)
+
+### How to Calibrate the OSC
+
+The frequency of the 40M clock can be fine-tuned by adjusting the adjustable resistor next to the VCTCXO. You need to have a reference signal source and frequency meter when adjusting.
+
+### How to boot from SD Card
+
+Connect SD-H jumper to 1V8. Check Jumper image for details. We don't have SD image yet. And we will support it later.
--- a/images/PTT_SCH.jpg
+++ b/images/PTT_SCH.jpg
--- a/images/clip_image002.jpg
+++ b/images/clip_image002.jpg
--- a/images/clip_image003.jpg
+++ b/images/clip_image003.jpg
--- a/images/dfu.jpg
+++ b/images/dfu.jpg
--- a/images/jumpers.jpg
+++ b/images/jumpers.jpg
--- a/images/ptt.jpg
+++ b/images/ptt.jpg
--- a/images/ref.jpg
+++ b/images/ref.jpg
--- a/images/ref_sch.jpg
+++ b/images/ref_sch.jpg
--- a/patches/buildroot.diff
+++ b/patches/buildroot.diff
@ -0,0 +1,108 @@
+diff --git a/board/pluto/busybox-1.25.0.config b/board/pluto/busybox-1.25.0.config
+index 88728cc9f2..78815511b9 100644
+--- a/board/pluto/busybox-1.25.0.config
+++ b/board/pluto/busybox-1.25.0.config
+@@ -880,10 +880,10 @@ CONFIG_FEATURE_IP_NEIGH=y
+ CONFIG_NAMEIF=y
+ # CONFIG_FEATURE_NAMEIF_EXTENDED is not set
+ # CONFIG_NBDCLIENT is not set
+-# CONFIG_NC is not set
+-# CONFIG_NC_SERVER is not set
+-# CONFIG_NC_EXTRA is not set
+-# CONFIG_NC_110_COMPAT is not set
+CONFIG_NC=y
+CONFIG_NC_SERVER=y
+CONFIG_NC_EXTRA=y
+CONFIG_NC_110_COMPAT=y
+ CONFIG_NETSTAT=y
+ # CONFIG_FEATURE_NETSTAT_WIDE is not set
+ # CONFIG_FEATURE_NETSTAT_PRG is not set
+diff --git a/board/pluto/motd b/board/pluto/motd
+index a3b3f6f664..55601033c6 100644
+--- a/board/pluto/motd
+++ b/board/pluto/motd
+@@ -1,10 +1,9 @@
+ Welcome to:
+-______ _       _        _________________
+-| ___ \ |     | |      /  ___|  _  \ ___ \
+-| |_/ / |_   _| |_ ___ \ `--.| | | | |_/ /
+-|  __/| | | | | __/ _ \ `--. \ | | |    /
+-| |   | | |_| | || (_) /\__/ / |/ /| |\ \
+-\_|   |_|\__,_|\__\___/\____/|___/ \_| \_|
+ ____  _       _
+|  _ \| |_   _| |_ ___    _
+| |_) | | | | | __/ _ \ _| |_
+|  __/| | |_| | || (_) |_   _|
+|_|   |_|\__,_|\__\___/  |_|
+ 
+ #BUILD#
+-https://wiki.analog.com/university/tools/pluto
+https://github.com/plutoplus/plutoplus
+diff --git a/configs/zynq_pluto_defconfig b/configs/zynq_pluto_defconfig
+index 7375c29a74..ff057b2955 100644
+--- a/configs/zynq_pluto_defconfig
+++ b/configs/zynq_pluto_defconfig
+@@ -32,6 +32,7 @@ BR2_PACKAGE_MTD=y
+ # BR2_PACKAGE_MTD_UBIRSVOL is not set
+ # BR2_PACKAGE_MTD_UBIUPDATEVOL is not set
+ # BR2_PACKAGE_MTD_UBIBLOCK is not set
+BR2_PACKAGE_NFS_UTILS=y
+ BR2_PACKAGE_LINUX_FIRMWARE=y
+ BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT61=y
+ BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT73=y
+@@ -39,22 +40,37 @@ BR2_PACKAGE_LINUX_FIRMWARE_RALINK_RT2XX=y
+ BR2_PACKAGE_LINUX_FIRMWARE_RTL_81XX=y
+ BR2_PACKAGE_LINUX_FIRMWARE_RTL_87XX=y
+ BR2_PACKAGE_LINUX_FIRMWARE_RTL_88XX=y
+BR2_PACKAGE_GPSD=y
+BR2_PACKAGE_GPSD_NTP_SHM=y
+BR2_PACKAGE_GPSD_UBX=y
+ BR2_PACKAGE_INPUT_EVENT_DAEMON=y
+ BR2_PACKAGE_UBOOT_TOOLS=y
+-BR2_PACKAGE_ZLIB=y
+BR2_PACKAGE_PHP=y
+BR2_PACKAGE_PHP_EXT_SOCKETS=y
+ BR2_PACKAGE_LIBAD9361_IIO=y
+ BR2_PACKAGE_LIBIIO_IIOD_USBD=y
+ BR2_PACKAGE_LIBIIO_TESTS=y
+BR2_PACKAGE_LIBV4L=y
+BR2_PACKAGE_LIBV4L_UTILS=y
+ BR2_PACKAGE_LIBINI=y
+BR2_PACKAGE_X264=y
+BR2_PACKAGE_FFTW_SINGLE=y
+BR2_PACKAGE_FFTW_FAST=y
+BR2_PACKAGE_BC=y
+ BR2_PACKAGE_AVAHI=y
+ BR2_PACKAGE_AVAHI_DAEMON=y
+ BR2_PACKAGE_AVAHI_LIBDNSSD_COMPATIBILITY=y
+ BR2_PACKAGE_DROPBEAR=y
+-BR2_PACKAGE_DROPBEAR_LOCALOPTIONS_FILE="board/pluto/dropbrear_localoptions.h"
+BR2_PACKAGE_DROPBEAR_MOTD=y
+BR2_PACKAGE_HOSTAPD=y
+ BR2_PACKAGE_IW=y
+BR2_PACKAGE_MOSQUITTO=y
+BR2_PACKAGE_NTP=y
+ BR2_PACKAGE_WPA_SUPPLICANT=y
+ BR2_PACKAGE_WPA_SUPPLICANT_CLI=y
+ BR2_PACKAGE_WPA_SUPPLICANT_PASSPHRASE=y
+BR2_PACKAGE_OPKG=y
+BR2_PACKAGE_NANO=y
+ BR2_PACKAGE_POLL_SYSFS=y
+ BR2_PACKAGE_AD936X_REF_CAL=y
+ BR2_TARGET_ROOTFS_CPIO=y
+@@ -63,3 +79,15 @@ BR2_TARGET_ROOTFS_CPIO_UIMAGE=y
+ BR2_PACKAGE_HOST_DOSFSTOOLS=y
+ BR2_PACKAGE_HOST_GENIMAGE=y
+ BR2_PACKAGE_HOST_MTOOLS=y
+BR2_PACKAGE_FFMPEG_43=y
+BR2_PACKAGE_ALSA_UTILS=y
+BR2_PACKAGE_ALSA_UTILS_APLAY=y
+BR2_PACKAGE_FFMPEG=y
+BR2_PACKAGE_FFMPEG_GPL=y
+BR2_PACKAGE_FFMPEG_SWSCALE=y
+BR2_PACKAGE_FFMPEG_ENCODERS="aac mpeg2video rawvideo libx264 dvbsub bmp png"
+BR2_PACKAGE_FFMPEG_DECODERS="aac aac_latm mpeg2video mp2 yuv4 rawvideo mjpeg h264 mp3 pcm_s16le hevc flv srt"
+BR2_PACKAGE_FFMPEG_MUXERS="adts flv mpegts rawvideo image2"
+BR2_PACKAGE_FFMPEG_DEMUXERS="aac h264 mpegts mpegvideo pcm_s16le rawvideo rtp hevc flv dvbsub"
+BR2_PACKAGE_FFMPEG_PARSERS="aac h264 mjpeg mpegaudio mpegvideo hevc"
+#BR2_PACKAGE_STRACE=y
--- a/patches/hdl.diff
+++ b/patches/hdl.diff
@ -1,8 +1,8 @@
 diff --git a/projects/pluto/system_bd.tcl b/projects/pluto/system_bd.tcl
-index 8a9634b9a..72644e176 100644
+index 8a9634b9..85c1bc28 100644
 --- a/projects/pluto/system_bd.tcl
 +++ b/projects/pluto/system_bd.tcl
-@@ -47,6 +47,11 @@ ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
+@@ -47,6 +47,12 @@ ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
 ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ 200.0
 ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE 1
 ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_IO 17
@ -11,10 +11,11 @@ index 8a9634b9a..72644e176 100644
 +ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27}
 +ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_GRP_MDIO_ENABLE 1
 +ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_GRP_MDIO_IO {MIO 52 .. 53}
+
 ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_PERIPHERAL_ENABLE 0
 ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_PERIPHERAL_ENABLE 0
 ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_PERIPHERAL_ENABLE 1
-@@ -54,16 +59,25 @@ ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_UART1_IO {MIO 12 .. 13}
+@@ -54,16 +60,28 @@ ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_UART1_IO {MIO 12 .. 13}
 ad_ip_parameter sys_ps7 CONFIG.PCW_I2C1_PERIPHERAL_ENABLE 0
 ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_PERIPHERAL_ENABLE 1
 ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE 1
@ -26,8 +27,10 @@ index 8a9634b9a..72644e176 100644
 +ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_SD0_IO "MIO 40 .. 45"
 +ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_CD_ENABLE 1
 +ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_CD_IO "MIO 47"
-+ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_47_PULLUP {disabled}
+ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_47_PULLUP {enabled}
 +ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_47_SLEW {slow}
+ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_POW_ENABLE    0
+ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_WP_ENABLE     0
 +
 ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE 0
 ad_ip_parameter sys_ps7 CONFIG.PCW_USE_FABRIC_INTERRUPT 1
@ -38,12 +41,13 @@ index 8a9634b9a..72644e176 100644
 +ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_IO {MIO 46}
 ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_ENABLE 1
 +ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_46_SLEW {slow}
+ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_46_PULLUP {enabled}
 +
 ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
 ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_MODE REVERSE
 ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_0_PULLUP {enabled}
 diff --git a/projects/pluto/system_constr.xdc b/projects/pluto/system_constr.xdc
-index 67a9558cf..9bf4e924f 100644
+index 67a9558c..9bf4e924 100644
 --- a/projects/pluto/system_constr.xdc
 +++ b/projects/pluto/system_constr.xdc
@@ -1,69 +1,69 @@
@ -382,7 +386,7 @@ index 67a9558cf..9bf4e924f 100644
 set_property SLEW FAST [get_ports *ddr_dqs*]
 set_property PACKAGE_PIN C2 [get_ports ddr_dqs_p[0]]
 diff --git a/projects/pluto/system_project.tcl b/projects/pluto/system_project.tcl
-index 89d81a448..fec220a11 100644
+index 89d81a44..fec220a1 100644
 --- a/projects/pluto/system_project.tcl
 +++ b/projects/pluto/system_project.tcl
@@ -3,7 +3,7 @@ source ../scripts/adi_env.tcl
--- a/patches/linux.diff
+++ b/patches/linux.diff
@ -1,5 +1,5 @@
 diff --git a/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts b/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
-index 7aff4e197d0f..6eadb4e519d9 100644
+index 7aff4e197d0f..5313336a30a4 100644
 --- a/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
 +++ b/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
@@ -17,46 +17,6 @@
@ -61,7 +61,7 @@ index 7aff4e197d0f..6eadb4e519d9 100644
 	leds {
 		compatible = "gpio-leds";
 		led0 {
-@@ -92,3 +57,81 @@
+@@ -92,3 +57,18 @@
 		};
 	};
 };
@ -80,74 +80,12 @@ index 7aff4e197d0f..6eadb4e519d9 100644
 +    pinctrl-names = "default";
 +    pinctrl-0 = <&pinctrl_usb0_default>;
 +};
-+
-+&pinctrl0 {
-+	pinctrl_gem0_default: gem0-default {
-+		mux {
-+			function = "ethernet0";
-+			groups = "ethernet0_0_grp";
-+		};
-+
-+		conf {
-+			groups = "ethernet0_0_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+		};
-+
-+		conf-rx {
-+			pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
-+			bias-high-impedance;
-+			low-power-disable;
-+		};
-+
-+		conf-tx {
-+			pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
-+			low-power-enable;
-+			bias-disable;
-+		};
-+
-+		mux-mdio {
-+			function = "mdio0";
-+			groups = "mdio0_0_grp";
-+		};
-+
-+		conf-mdio {
-+			groups = "mdio0_0_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+			bias-disable;
-+		};
-+	};
-+
-+    pinctrl_usb0_default: usb0-default {
-+        mux {
-+                groups = "usb0_0_grp";
-+                function = "usb0";
-+        };
-+
-+            conf {
-+                groups = "usb0_0_grp";
-+                slew-rate = <0>;
-+                io-standard = <1>;
-+        };
-+
-+        conf-rx {
-+                pins = "MIO29", "MIO31", "MIO36";
-+                bias-high-impedance;
-+        };
-+
-+        conf-tx {
-+                pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
-+                        "MIO35", "MIO37", "MIO38", "MIO39";
-+                bias-disable;
-+        };
-+    };
-+};
+\ No newline at end of file
 diff --git a/arch/arm/boot/dts/zynq-pluto-sdr.dtsi b/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
-index 6cd0e41e5411..7759d862be1e 100644
+index e936f48dbd73..bad6c46056a5 100644
 --- a/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
 +++ b/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
-@@ -40,8 +40,17 @@
+@@ -40,8 +40,16 @@
 
 };
 
@ -161,20 +99,13 @@ index 6cd0e41e5411..7759d862be1e 100644
 &sdhci0 {
 -	status = "disabled";
 +	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_sdhci0_default>;
+    disable-wp;
 };
 
 &watchdog0 {
-@@ -49,13 +58,35 @@
- 	reset-on-timeout;
+@@ -50,12 +58,29 @@
 };
 
-+&gpio0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_gpio0_default>;
-+};
-+
 &usb0 {
 -	xlnx,phy-reset-gpio = <&gpio0 52 0>;
 +	xlnx,phy-reset-gpio = <&gpio0 46 0>;
@ -203,7 +134,7 @@ index 6cd0e41e5411..7759d862be1e 100644
 &qspi {
 	status = "okay";
 	is-dual = <0>;
-@@ -97,6 +128,18 @@
+@@ -98,6 +123,18 @@
 	};
 };
 
@ -222,7 +153,7 @@ index 6cd0e41e5411..7759d862be1e 100644
 / {
 	fpga_axi: fpga-axi@0 {
 		compatible = "simple-bus";
-@@ -186,6 +229,146 @@
+@@ -187,6 +224,148 @@
 	};
 };
 
@ -279,9 +210,11 @@ index 6cd0e41e5411..7759d862be1e 100644
 +		conf-rx {
 +			pins = "MIO29", "MIO31", "MIO36";
 +			bias-high-impedance;
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+			bias-disable;
+		};
+
+		conf-pull-up {
+			pins = "MIO46";
+			bias-pull-up;
 +		};
 +
 +		conf-tx {
@ -309,7 +242,7 @@ index 6cd0e41e5411..7759d862be1e 100644
 +		};
 +
 +		conf-pull-none {
-+			pins = "MIO7", "MIO11", "MIO46";
+			pins = "MIO7", "MIO11";
 +			bias-disable;
 +		};
 +	};
@ -370,7 +303,7 @@ index 6cd0e41e5411..7759d862be1e 100644
 	status = "okay";
 
 diff --git a/arch/arm/configs/zynq_pluto_defconfig b/arch/arm/configs/zynq_pluto_defconfig
-index e00b680e8baa..7bd885f59489 100644
+index ca72dd96a29d..01ed0ddd753d 100644
 --- a/arch/arm/configs/zynq_pluto_defconfig
 +++ b/arch/arm/configs/zynq_pluto_defconfig
@@ -270,3 +270,15 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60
@ -389,31 +322,3 @@ index e00b680e8baa..7bd885f59489 100644
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_PLTFM=y
 +CONFIG_MMC_SDHCI_OF_ARASAN=y
-diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
-index 3b87b2e4486d..0d4602c59b75 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
-+++ b/drivers/net/ethernet/cadence/macb_main.c
-@@ -1983,15 +1983,17 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
- 		goto unlock;
- 	}
- 
-	/* Make newly initialized descriptor visible to hardware */
-	wmb();
-	skb_tx_timestamp(skb);
-
-	macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
-
- 	if (CIRC_SPACE(queue->tx_head, queue->tx_tail, bp->tx_ring_size) < 1)
- 		netif_stop_subqueue(dev, queue_index);
- 
-+	skb_tx_timestamp(skb);
-+
-+	if (!skb->xmit_more || __netif_subqueue_stopped(dev, queue_index)) {
-+		/* Make newly initialized descriptor visible to hardware */
-+		wmb();
-+		macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
-+	}
-+
- unlock:
- 	spin_unlock_irqrestore(&bp->lock, flags);
- 
--- a/patches/u-boot-xlnx.diff
+++ b/patches/u-boot-xlnx.diff
@ -1,5 +1,5 @@
 diff --git a/arch/arm/dts/zynq-pluto-sdr.dts b/arch/arm/dts/zynq-pluto-sdr.dts
-index c618d98b54..684826ebe6 100644
+index c618d98b54..c318383554 100644
 --- a/arch/arm/dts/zynq-pluto-sdr.dts
 +++ b/arch/arm/dts/zynq-pluto-sdr.dts
@@ -16,6 +16,7 @@
@ -10,186 +10,20 @@ index c618d98b54..684826ebe6 100644
 	};
 
 	memory {
-@@ -66,12 +67,167 @@
- 	};
- };
- 
-+&gpio0 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_gpio0_default>;
-+};
-+
- &uart1 {
- 	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_uart1_default>;
- };
- 
- &usb0 {
- 	status = "okay";
+@@ -75,3 +76,8 @@
 	dr_mode = "host";
 	usb-phy = <&usb_phy0>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_usb0_default>;
-+};
+ };
 +
 +&sdhci0 {
 +	u-boot,dm-pre-reloc;
 +	status = "okay";
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_sdhci0_default>;
- };
-+
-+&pinctrl0 {
-+	pinctrl_gem0_default: gem0-default {
-+			mux {
-+				function = "ethernet0";
-+				groups = "ethernet0_0_grp";
-+			};
-+
-+			conf {
-+				groups = "ethernet0_0_grp";
-+				slew-rate = <0>;
-+				io-standard = <1>;
-+			};
-+
-+			conf-rx {
-+				pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
-+				bias-high-impedance;
-+				low-power-disable;
-+			};
-+
-+			conf-tx {
-+				pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
-+				low-power-enable;
-+				bias-disable;
-+			};
-+
-+			mux-mdio {
-+				function = "mdio0";
-+				groups = "mdio0_0_grp";
-+			};
-+
-+			conf-mdio {
-+				groups = "mdio0_0_grp";
-+				slew-rate = <0>;
-+				io-standard = <1>;
-+				bias-disable;
-+			};
-+	};
-+
-+	pinctrl_usb0_default: usb0-default {
-+		mux {
-+			groups = "usb0_0_grp";
-+			function = "usb0";
-+		};
-+
-+		conf {
-+			groups = "usb0_0_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+		};
-+
-+		conf-rx {
-+			pins = "MIO29", "MIO31", "MIO36";
-+			bias-high-impedance;
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+			bias-disable;
-+		};
-+
-+		conf-tx {
-+			pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
-+					"MIO35", "MIO37", "MIO38", "MIO39";
-+			bias-disable;
-+		};
-+	};
-+
-+	pinctrl_gpio0_default: gpio0-default {
-+		mux {
-+			function = "gpio0";
-+			groups = "gpio0_7_grp", "gpio0_11_grp", "gpio0_14_grp", "gpio0_46_grp";
-+		};
-+
-+		conf {
-+			groups = "gpio0_7_grp", "gpio0_11_grp", "gpio0_14_grp", "gpio0_46_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+		};
-+
-+		conf-pull-up {
-+			pins = "MIO14";
-+			bias-pull-up;
-+		};
-+
-+		conf-pull-none {
-+			pins = "MIO7", "MIO11", "MIO46";
-+			bias-disable;
-+		};
-+	};
-+
-+	pinctrl_sdhci0_default: sdhci0-default {
-+		mux {
-+			groups = "sdio0_2_grp";
-+			function = "sdio0";
-+		};
-+
-+		conf {
-+			groups = "sdio0_2_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+			bias-disable;
-+		};
-+
-+		mux-cd {
-+			groups = "gpio0_47_grp";
-+			function = "sdio0_cd";
-+		};
-+
-+		conf-cd {
-+			groups = "gpio0_47_grp";
-+			bias-high-impedance;
-+			bias-pull-up;
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+		};
-+	};
-+
-+	pinctrl_uart1_default: uart1-default {
-+		mux {
-+			groups = "uart1_1_grp";
-+			function = "uart1";
-+		};
-+
-+		conf {
-+			groups = "uart1_1_grp";
-+			slew-rate = <0>;
-+			io-standard = <1>;
-+		};
-+
-+		conf-rx {
-+			pins = "MIO13";
-+			bias-high-impedance;
-+		};
-+
-+		conf-tx {
-+			pins = "MIO12";
-+			bias-disable;
-+		};
-+	};
 +};
 \ No newline at end of file
 diff --git a/configs/zynq_pluto_defconfig b/configs/zynq_pluto_defconfig
-index 0daf46221e..9006b8bcf4 100644
+index 0daf46221e..5991fa6cf7 100644
 --- a/configs/zynq_pluto_defconfig
 +++ b/configs/zynq_pluto_defconfig
-@@ -1,5 +1,5 @@
- CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
-+CONFIG_SYS_CONFIG_NAME="zynq_pluto"
- CONFIG_ARCH_ZYNQ=y
- CONFIG_SYS_MALLOC_F_LEN=0x800
- CONFIG_DEFAULT_DEVICE_TREE="zynq-pluto-sdr"
@@ -7,13 +7,14 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@ -218,9 +52,8 @@ index 0daf46221e..9006b8bcf4 100644
 +CONFIG_NAND_ARASAN=y
 +CONFIG_DM_ETH=y
 +CONFIG_ZYNQ_GEM=y
-\ No newline at end of file
 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
-index 50e93061a9..f7c2e010b8 100644
+index c0e9a47b2b..39967684bd 100644
 --- a/include/configs/zynq-common.h
 +++ b/include/configs/zynq-common.h
@@ -257,7 +257,7 @@
@ -232,33 +65,12 @@ index 50e93061a9..f7c2e010b8 100644
 	"clear_reset_cause=mw f8000008 df0d && mw f8000258 00400000 && mw f8000004 767b\0" \
 	"loadbootenv=load mmc 0 ${loadbootenv_addr} ${bootenv}\0" \
 	"importbootenv=echo Importing environment from SD ...; " \
-diff --git a/include/configs/zynq_pluto.h b/include/configs/zynq_pluto.h
-new file mode 100644
-index 0000000000..8c0e74d770
--- /dev/null
-+++ b/include/configs/zynq_pluto.h
-@@ -0,0 +1,24 @@
-+/*
-+ * (C) Copyright 2013 Xilinx, Inc.
-+ *
-+ * Configuration settings for the PlutoSDR Boards
-+ * See zynq-common.h for Zynq common configs
-+ *
-+ * SPDX-License-Identifier:	GPL-2.0+
-+ */
-+
-+#ifndef __CONFIG_ZYNQ_PLUTOSDR_H
-+#define __CONFIG_ZYNQ_PLUTOSDR_H
-+
-+#define CONFIG_ZYNQ_I2C0
-+#define CONFIG_ZYNQ_EEPROM
-+#define CONFIG_ZYNQ_USB
-+#define CONFIG_DFU_SF
-+
-+#define CONFIG_MII
-+#define CONFIG_PHY_ADDR 0
-+#define CONFIG_HAS_ETH0
-+
-+#include <configs/zynq-common.h>
-+
-+#endif /* __CONFIG_ZYNQ_PLUTOSDR_H */
+@@ -269,7 +269,7 @@
+ 			"fi; " \
+ 		"fi; \0" \
+ 	"refclk_source=internal\0" \
+-	"mode=1r1t\0" \
+	"mode=2r2t\0" \
+ 	"adi_loadvals_pluto=if test -n \"${ad936x_ext_refclk}\" && test ! -n \"${ad936x_skip_ext_refclk}\"; then " \
+ 			"fdt set /clocks/clock@0 clock-frequency ${ad936x_ext_refclk}; " \
+ 		"fi; " \
--- a/2
+++ b/2
@ -1 +1 @@
-Subproject commit 8af5c0add438e4c6a3479d2f0c680b2d142eeaf5
+Subproject commit d38242e8bd740ea8fc35cc4fe7436401b39905f2
--- a/sch/Bottom.pdf
+++ b/sch/Bottom.pdf
--- a/sch/PLUTOX_SDR-V1.0-20201212.pdf
+++ b/sch/PLUTOX_SDR-V1.0-20201212.pdf
--- a/sch/Top.pdf
+++ b/sch/Top.pdf
--- a/scripts/apply.sh
+++ b/scripts/apply.sh
@ -0,0 +1,11 @@
+cd plutosdr-fw
+git apply ../patches/fw.diff
+cd hdl
+git apply ../../patches/hdl.diff
+cd ../linux
+git apply ../../patches/linux.diff
+cd ../u-boot-xlnx
+git apply ../../patches/u-boot-xlnx.diff
+cd ../buildroot
+git apply ../../patches/buildroot.diff
+cd ../..
--- a/scripts/collect.sh
+++ b/scripts/collect.sh
@ -0,0 +1,11 @@
+cd plutosdr-fw
+git diff --ignore-submodules > ../patches/fw.diff
+cd hdl
+git diff > ../../patches/hdl.diff
+cd ../linux
+git diff > ../../patches/linux.diff
+cd ../u-boot-xlnx
+git diff > ../../patches/u-boot-xlnx.diff
+cd ../buildroot
+git diff > ../../patches/buildroot.diff
+cd ../..
--- a/scripts/revert.sh
+++ b/scripts/revert.sh
@ -0,0 +1,11 @@
+cd plutosdr-fw
+git checkout .
+cd hdl
+git checkout .
+cd ../linux
+git checkout .
+cd ../buildroot
+git checkout .
+cd ../u-boot-xlnx
+git checkout .
+cd ../..
Author	SHA1	Message	Date
Howard Su	875f62a88e	ignore submodule for diff	2021-06-18 09:17:37 +08:00
Howard Su	07dd8b82fc	Add download link to schematics	2021-06-18 09:07:19 +08:00
Howard Su	0d7f1f5a12	Add the additional packages for DATV application	2021-06-18 08:54:35 +08:00
Howard Su	bb13ef82ea	Change motd	2021-06-17 23:21:38 +08:00
Howard Su	024e131080	Update to latest	2021-06-17 20:30:29 +08:00
Howard Su	e273e41e17	Add scripts to manage the patches	2021-06-17 18:06:51 +08:00
Howard Su	67ddd7498e	Simplify the patch on Linux DTS	2021-04-24 15:44:26 +08:00
Jun Su	ce249ba162	Add Schematics	2021-04-23 17:38:41 +08:00
Jun Su	c3d9ca50f8	Update more information	2021-04-23 17:34:47 +08:00
Howard Su	4598036aab	Create README.md	2021-04-23 16:44:50 +08:00