plutosdr_fw_path/patches/linux.diff

diff --git a/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts b/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
index 7aff4e197d0f..5313336a30a4 100644
--- a/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
+++ b/arch/arm/boot/dts/zynq-pluto-sdr-revc.dts
@@ -17,46 +17,6 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
-/* These GPIO hogs are configured by u-boot environment */
-&gpio0 {
-	clock_extern_en {
-		gpio-hog;
-		gpios = <48 0>;
-		output-high;
-	};
-
-	clock_internal_en {
-		gpio-hog;
-		gpios = <48 0>;
-		output-low;
-	};
-};
-
-&amba {
-	axi_spi: axi_quad_spi@7C430000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		bits-per-word = <8>;
-		compatible = "xlnx,xps-spi-2.00.a";
-		fifo-size = <16>;
-		interrupt-parent = <&intc>;
-		interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
-		cs-gpios = <&gpio0 49 0>;
-		num-cs = <0x1>;
-		reg = <0x7C430000 0x10000>;
-		xlnx,num-ss-bits = <0x1>;
-		xlnx,spi-mode = <0>;
-
-		spidev0: spidev@0 {
-			compatible = "adi,swspi";
-			reg = <0>;	/* CE0 */
-			#address-cells = <1>;
-			#size-cells = <0>;
-			spi-max-frequency = <125000000>;
-		};
-	};
-};
-
 &adc0_ad9364 {
 	/* This property is controlled by u-boot environment. */
 	adi,2rx-2tx-mode-enable;
@@ -70,6 +30,11 @@
 / {
 	model = "Analog Devices PlutoSDR Rev.C (Z7010/AD9363)";
 
+	aliases {
+		ethernet0 = &gem0;
+		mmc0 = &sdhci0;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		led0 {
@@ -92,3 +57,18 @@
 		};
 	};
 };
+
+&gem0 {
+	status = "okay";
+
+    pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gem0_default>;
+};
+
+&usb0 {
+	status = "okay";
+	dr_mode = "otg";
+	usb-phy = <&usb_phy0>;
+    pinctrl-names = "default";
+    pinctrl-0 = <&pinctrl_usb0_default>;
+};
\ No newline at end of file
diff --git a/arch/arm/boot/dts/zynq-pluto-sdr.dtsi b/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
index e936f48dbd73..bad6c46056a5 100644
--- a/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
+++ b/arch/arm/boot/dts/zynq-pluto-sdr.dtsi
@@ -40,8 +40,16 @@
 
 };
 
+&uart1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1_default>;
+};
+
 &sdhci0 {
-	status = "disabled";
+	status = "okay";
+    disable-wp;
 };
 
 &watchdog0 {
@@ -50,12 +58,29 @@
 };
 
 &usb0 {
-	xlnx,phy-reset-gpio = <&gpio0 52 0>;
+	xlnx,phy-reset-gpio = <&gpio0 46 0>;
 	dr_mode = "otg";
 	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb0_default>;
 	usb-phy = <&usb_phy0>;
 };
 
+&gem0 {
+	status = "ok";
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethernet_phy>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_gem0_default>;
+
+
+	ethernet_phy: ethernet-phy@1 {
+		reg = <1>;
+		device_type = "ethernet-phy";
+	};
+};
+
+
 &qspi {
 	status = "okay";
 	is-dual = <0>;
@@ -98,6 +123,18 @@
 	};
 };
 
+
+&gem0 {
+	status = "disabled";
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethernet_phy>;
+
+	ethernet_phy: ethernet-phy@1 {
+		reg = <1>;
+		device_type = "ethernet-phy";
+	};
+};
+
 / {
 	fpga_axi: fpga-axi@0 {
 		compatible = "simple-bus";
@@ -187,6 +224,148 @@
 	};
 };
 
+&pinctrl0 {
+	pinctrl_gem0_default: gem0-default {
+			mux {
+				function = "ethernet0";
+				groups = "ethernet0_0_grp";
+			};
+
+			conf {
+				groups = "ethernet0_0_grp";
+				slew-rate = <0>;
+				io-standard = <1>;
+			};
+
+			conf-rx {
+				pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
+				bias-high-impedance;
+				low-power-disable;
+			};
+
+			conf-tx {
+				pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
+				low-power-enable;
+				bias-disable;
+			};
+
+			mux-mdio {
+				function = "mdio0";
+				groups = "mdio0_0_grp";
+			};
+
+			conf-mdio {
+				groups = "mdio0_0_grp";
+				slew-rate = <0>;
+				io-standard = <1>;
+				bias-disable;
+			};
+	};
+
+	pinctrl_usb0_default: usb0-default {
+		mux {
+			groups = "usb0_0_grp";
+			function = "usb0";
+		};
+
+		conf {
+			groups = "usb0_0_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+
+		conf-rx {
+			pins = "MIO29", "MIO31", "MIO36";
+			bias-high-impedance;
+		};
+
+		conf-pull-up {
+			pins = "MIO46";
+			bias-pull-up;
+		};
+
+		conf-tx {
+			pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+					"MIO35", "MIO37", "MIO38", "MIO39";
+			bias-disable;
+		};
+	};
+
+	pinctrl_gpio0_default: gpio0-default {
+		mux {
+			function = "gpio0";
+			groups = "gpio0_7_grp", "gpio0_11_grp", "gpio0_14_grp", "gpio0_46_grp";
+		};
+
+		conf {
+			groups = "gpio0_7_grp", "gpio0_11_grp", "gpio0_14_grp", "gpio0_46_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+
+		conf-pull-up {
+			pins = "MIO14";
+			bias-pull-up;
+		};
+
+		conf-pull-none {
+			pins = "MIO7", "MIO11";
+			bias-disable;
+		};
+	};
+
+	pinctrl_sdhci0_default: sdhci0-default {
+		mux {
+			groups = "sdio0_2_grp";
+			function = "sdio0";
+		};
+
+		conf {
+			groups = "sdio0_2_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+			bias-disable;
+		};
+
+		mux-cd {
+			groups = "gpio0_47_grp";
+			function = "sdio0_cd";
+		};
+
+		conf-cd {
+			groups = "gpio0_47_grp";
+			bias-high-impedance;
+			bias-pull-up;
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+	};
+
+	pinctrl_uart1_default: uart1-default {
+		mux {
+			groups = "uart1_1_grp";
+			function = "uart1";
+		};
+
+		conf {
+			groups = "uart1_1_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+
+		conf-rx {
+			pins = "MIO13";
+			bias-high-impedance;
+		};
+
+		conf-tx {
+			pins = "MIO12";
+			bias-disable;
+		};
+	};
+};
+
+
 &spi0 {
 	status = "okay";
 
diff --git a/arch/arm/configs/zynq_pluto_defconfig b/arch/arm/configs/zynq_pluto_defconfig
index ca72dd96a29d..01ed0ddd753d 100644
--- a/arch/arm/configs/zynq_pluto_defconfig
+++ b/arch/arm/configs/zynq_pluto_defconfig
@@ -270,3 +270,15 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60
 CONFIG_DEBUG_LL=y
 CONFIG_DEBUG_ZYNQ_UART1=y
 CONFIG_EARLY_PRINTK=y
+
+CONFIG_OF_MDIO=y
+CONFIG_REALTEK_PHY=y
+CONFIG_ETHERNET=y
+CONFIG_NET_VENDOR_XILINX=y
+CONFIG_XILINX_AXI_EMAC=y
+CONFIG_MACB=y
+
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y