Lars-Peter Clausen bfd84edc46 adi_ip.tcl: adi_ip_constraints: Add support for VHDL projects ... Match both xilinx_verilogsynthesis and xilinx_vhdlsynthesis when getting the file group. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2015-04-16 17:48:28 +02:00
..
adi_env.tcl	adi_env.tcl: Make default ad_hdl_dir path detection more robust	2015-04-08 14:43:56 +02:00
adi_ip.tcl	adi_ip.tcl: adi_ip_constraints: Add support for VHDL projects	2015-04-16 17:48:28 +02:00