3e0b337eae
The register read logic is not that complicated that it needs two extra pipeline stages. It can easily be condensed into a single combinatorial and still meet timing with large margins. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| .. | ||
| Makefile | ||
| axi_ad9963.v | ||
| axi_ad9963_if.v | ||
| axi_ad9963_ip.tcl | ||
| axi_ad9963_rx.v | ||
| axi_ad9963_rx_channel.v | ||
| axi_ad9963_rx_pnmon.v | ||
| axi_ad9963_tx.v | ||
| axi_ad9963_tx_channel.v | ||