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Adrian Costina f62bc5cc9a motcon2_fmc: Updated design 
- separated clocks for ethernet and other cores in the design
- removed constraints that were not needed
 		2015-03-12 16:55:36 +02:00
library utiil_gmii_to_rgmii: registerd Rx/ Tx paths. Changed RX clock buffers to a single BUFG 2015-03-12 16:51:31 +02:00
projects motcon2_fmc: Updated design 2015-03-12 16:55:36 +02:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md README: Add tools version 2015-01-06 10:24:06 +02:00

README.md

hdl

Analog Devices HDL libraries and projects

Tools version:

  • Vivado 2014.2
  • Quartus 14.0

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga