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Lars-Peter Clausen 17a993032b util_dac_unpack: Make number of channels and channel width configurable 
Always using 128bit for the input word unnecessarily increases the DMA
alignment requirements. This breaks existing software which assumes that the
DMA alignment requirement is 64bit.

So make it configurable whether we want 8 or 4 channels and while we are at
it also make the channel width configurable.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2014-09-12 16:14:04 +02:00
..
axi_ad9122 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9144 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9250 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9361 axi_ad9361: Remove the Altera toplevel wrapper 2014-09-11 12:29:13 +02:00
axi_ad9467 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9625 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9643 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9652 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9671 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_ad9680 Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_clkgen Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_dmac axi_dmac: Remove Altera toplevel wrapper 2014-09-11 12:28:14 +02:00
axi_fifo axi_fifo: Slightly improve timing 2014-04-10 13:50:39 +02:00
axi_fifo2s Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
axi_hdmi_tx Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_i2s_adi Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_jesd_gt Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_mc_controller Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_mc_current_monitor Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_mc_speed Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
axi_spdif_tx Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
common up_axi: Add parameter to configure the internal address width 2014-09-11 12:26:40 +02:00
controllerperipheralhdladi_pcore motor_control: Updated the FOC IP 2014-09-08 15:52:18 +03:00
ip_pid_controller Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
prcfg prcfg: Update the prcfg logic to the new ad9361 interface 2014-08-05 17:54:37 +03:00
scripts Remove BASEADDR/HIGHADDR parameters 2014-09-11 12:26:37 +02:00
util_adc_pack fmcomms2:c5soc project upgraded with util_dac_unpack 2014-09-11 15:13:09 -04:00
util_dac_unpack util_dac_unpack: Make number of channels and channel width configurable 2014-09-12 16:14:04 +02:00
util_i2c_mixer pointers to directories 2014-02-28 16:58:30 -05:00
util_rfifo fifo- monitor status signals 2014-06-25 12:15:13 -04:00
util_sync_reset util_sync_reset: Fix polarity of the sync_resetn signal 2014-03-25 13:03:12 +01:00
util_wfifo fifo- monitor status signals 2014-06-25 12:15:13 -04:00