738f7af23b
In general we have to add a delay of half SCLK cycle. (latch the MISO on the next consecutive SCLK edge) |
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ad40xx_bd.tcl |
738f7af23b
In general we have to add a delay of half SCLK cycle. (latch the MISO on the next consecutive SCLK edge) |
||
---|---|---|
.. | ||
ad40xx_bd.tcl |