zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
4,195 Commits
1 Branch
0 Tags
23 MiB
Verilog 61.7%
Tcl 31.2%
Makefile 3.5%
VHDL 1.9%
SystemVerilog 1%
Other 0.6%
 
 
 
 
 
 
Go to file
Lars-Peter Clausen e6aacd2f56 axi_dmac: Better support debug IDs when ID_WIDTH != 3 
The current layout of the debug ID register assumes that the ID_WIDTH is 3.
Change things so that the padding 0 width depends on the ID_WIDTH
parameter so that we end up with the same register layout regardless of the
value of ID_WIDTH.

Also split things into two registers, this allows for an ID_WIDTH up to 8
(which should hopefully be enough for all practical applications).

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-08-24 17:42:20 +02:00
library axi_dmac: Better support debug IDs when ID_WIDTH != 3 2017-08-24 17:42:20 +02:00
projects adrv9371x_zcu102: Initial commit 2017-08-22 15:48:03 +03:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore 2016-12-19 15:37:05 +00:00
LICENSE license: GPL must be GPL v2 2017-05-31 18:18:45 +03:00
LICENSE_ADIBSD license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_GPL2 license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_LGPL license: Add top level license files 2017-05-29 09:57:39 +03:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update the README 2016-03-31 19:42:52 +03:00

README.md

HDL Reference Designs

Analog Devices Inc. HDL libraries and projects

Branches

Each release has its own branch and master always synced with the latest release. To find out more information about the latest release please check the release notes. Every branch, which has dev in its name, is a development branch and should handle it accordingly.

Latest Release Notes

HDL User Guide

HDL Help & Support