zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
584 Commits
1 Branch
0 Tags
23 MiB
Verilog 61.7%
Tcl 31.2%
Makefile 3.5%
VHDL 1.9%
SystemVerilog 1%
Other 0.6%
 
 
 
 
 
 
Go to file
Adrian Costina db18ed4af2 fmcomms2: Updated ac701 project to vivado 2014.2. 
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
 		2014-11-07 13:56:00 +02:00
library Revert "ad_interrupts: Initial check in." 2014-11-06 12:16:52 +02:00
projects fmcomms2: Updated ac701 project to vivado 2014.2. 2014-11-07 13:56:00 +02:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Add a link to EngineerZone 2014-04-15 10:25:18 +03:00

README.md

hdl

Analog Devices HDL libraries and projects

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga