00166d86b5
For Intel projects: In cases where the clock of source synchronous interface is not routed through a clock capable pin the DPA receive mode can't be used. Instead the clock will be routed through a clock buffer from an IO to the clock tree and from there to the IOPLL. |
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| .. | ||
| axi_ad9361_alt_lvds_rx.v | ||
| axi_ad9361_alt_lvds_tx.v | ||
| axi_ad9361_cmos_if.v | ||
| axi_ad9361_lvds_if.v | ||
| axi_ad9361_lvds_if_10.v | ||
| axi_ad9361_lvds_if_c5.v | ||