7cdb11cc34
+ Add a HDL parameter for the PPS receiver module : PPS_RECEIVER_ENABLE. By default the module is disabled. + Add the CMOS_OR_LVDS_N and PPS_RECEIVER_ENABLE into the CONFIG register + Define a pps_status read only register, which will be asserted, if the free running counter reach a certain fixed threshold. (2^28) The register can be deasserted by an incomming PPS only. |
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.. | ||
ccbob_cmos | ||
ccbob_lvds | ||
ccbox_lvds | ||
ccfmc_lvds | ||
ccpci_lvds | ||
ccusb_lvds | ||
common | ||
Makefile | ||
README.md |
README.md
ADRV1CRR SDR SOM
This folder contains the ADRV1CRR SOM projects for each of the carrier boards.
Board Design Files
Directory/File | Description |
---|---|
common/adrv9361z7035_bd.tcl | ADRV1CRR SOM module board design file. |
common/ccbob_bd.tcl | carrier, break out board design file. |
common/ccfmc_bd.tcl | carrier, fmc board design file. |
common/ccpci_bd.tcl | carrier, pci-e board design file. |
common/ccusb_bd.tcl | carrier, usb board design file. |
FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.
Board Constraint Files
Directory/File | Description |
---|---|
common/adrv9361z7035_constr.xdc | ADRV1CRR SOM base constraints file. |
common/adrv9361z7035_constr_cmos.xdc | ADRV1CRR SOM CMOS mode constraints file. |
common/adrv9361z7035_constr_lvds.xdc | ADRV1CRR SOM LVDS mode constraints file. |
common/ccbob_constr.xdc | carrier, break out board constraints file. |
common/ccfmc_constr.xdc | carrier, fmc board constraints file. |
common/ccpci_constr.xdc | carrier, pci-e board constraints file. |
common/ccusb_constr.xdc | carrier, usb board constraints file. |
FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.
Building, Generating Bit Files
[adrv9361z7035] cd ccbob_cmos
[adrv9361z7035/ccbob_cmos] make
The make in each carrier directory builds the corresponding project. The above example builds ADRV1CRR-BOB hardware bit files in CMOS mode.