d8651cdd2e
We only do have 4 channels in this design. Reducing the number of supported channels for the dac_util_unpack core to 4 from 8 lowers the DMA alignment requirement from 128bit to 64bit. We need this since applications only expect a DMA alignment requirement of 64bit. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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README.md
hdl
Analog Devices HDL libraries and projects
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http://wiki.analog.com/resources/fpga/docs/hdl
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