Lars-Peter Clausen cc265b6b9c daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal ... For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2014-10-29 18:15:54 +01:00
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ad9265_fmc	…
ad9434_fmc	…
ad9467_fmc	…
ad9625_fmc	daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal	2014-10-29 18:15:54 +01:00
ad9625x2_fmc	…
ad9671_fmc	ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met	2014-10-29 18:25:56 +02:00
ad9680_eval	…
adv7511	…
common	ad9625_fmc/zc706: ps7 interrupt updates	2014-10-29 12:13:44 -04:00
daq1	…
daq2	daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal	2014-10-29 18:15:54 +01:00
daq3	daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal	2014-10-29 18:15:54 +01:00
fmcadc3	…
fmcjesdadc1	…
fmcomms1	…
fmcomms2	…
fmcomms2_pr	…
fmcomms5	…
fmcomms6	…
motor_control	…
pmods	…
scripts	…
usdrx1	…