51ebe6b35d
The sdo_enabled and sdi_enabled control lines are generated from the current state of the CMD bus. In case of a delayed SDI latching the sdi_enabled can be deasserted at the moment of the last valid bit, losing the generation of the sdi_data_valid signal, which eventually cause a data loss, or even deadlock on software driver. To make the logic mode robust, latch the value of the CMD[9:8] at every transfer command. Doing so the sdo_enabled and sdi_enabled control lines will store the last active transfer command state and they will be independent of the current state of the CMD bus. This way we can add longer time delay to the SDI latching if it's necessary. |
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| .. | ||
| axi_spi_engine | ||
| interfaces | ||
| spi_engine_execution | ||
| spi_engine_interconnect | ||
| spi_engine_offload | ||