Istvan Csomortani ac2e5a9dac constraints: Update constraints ... Xilinx recommends that all synchronizer flip-flops have their ASYNC_REG property set to true in order to preserve the synchronizer cells through any logic optimization during synthesis and implementation.		2017-02-24 13:43:32 +02:00
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Makefile	Make: Update Makefiles	2017-02-10 16:32:58 +02:00
system_bd.tcl	Add .gitattributes file	2015-06-26 11:07:10 +02:00
system_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
system_project.tcl	fmcjesdadc1: Intergrate ad_sysref_gen into project	2016-12-19 13:37:29 +00:00
system_top.v	fmcjesdadc1: Reduce SYSREF period	2017-01-12 16:10:45 +02:00