Adrian Costina 9f8a94df69 axi_logic_analyzer: Streaming flag initial commit ... If the streaming bit is set, after the trigger condition is met data will be continuosly captured by the DMA. The streaming bit must be set to 0 to reset triggering.		2017-07-03 18:00:23 +03:00
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Makefile	axi_logic_analyzer: Initial commit	2017-01-31 16:23:56 +02:00
axi_logic_analyzer.v	axi_logic_analyzer: Streaming flag initial commit	2017-07-03 18:00:23 +03:00
axi_logic_analyzer_constr.xdc	axi_logic_analyzer: Fixed triggered flag	2017-07-03 12:59:24 +03:00
axi_logic_analyzer_ip.tcl	library: Delete all adi_ip_constraint process call	2017-04-06 12:36:47 +03:00
axi_logic_analyzer_reg.v	axi_logic_analyzer: Streaming flag initial commit	2017-07-03 18:00:23 +03:00
axi_logic_analyzer_trigger.v	license: Add some clarification to the header license	2017-05-31 18:18:56 +03:00