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source ../common/pzsdr2_bd.tcl
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source ../common/ccbrk_bd.tcl
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set_property -dict [list CONFIG.SEL_0_DIV {2}] $clkdiv
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set_property -dict [list CONFIG.SEL_1_DIV {1}] $clkdiv
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cfg_ad9361_interface CMOS
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set_property CONFIG.ADC_INIT_DELAY 29 [get_bd_cells axi_ad9361]
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