AndreiGrozav c235e5e583 axi_pwm_gen: Initial commit ... axi_pwm_gen is based on util_pulse_gen, it introduces the option of phase option between pulses(PWMs) and external synchronization. Documentation available at https://wiki.analog.com/resources/fpga/docs/axi_pwm_gen		2021-05-07 19:09:32 +03:00
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Makefile	axi_pulse_gen: Initial commit	2019-03-20 08:21:22 +00:00
axi_pulse_gen.v	axi_pwm_gen: Initial commit	2021-05-07 19:09:32 +03:00
axi_pulse_gen_constr.sdc	axi_laser_driver: Add support for Intel platforms	2019-10-02 15:32:17 +03:00
axi_pulse_gen_constr.ttcl	axi_pulse_gen: Update constraint file	2019-08-08 14:26:07 +03:00
axi_pulse_gen_ip.tcl	library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl	2019-06-29 06:53:51 +03:00
axi_pulse_gen_regmap.v	axi_pulse_gen_regmap: Rename the clk output to clk_out	2019-08-08 14:26:07 +03:00