Istvan Csomortani ac2e5a9dac constraints: Update constraints ... Xilinx recommends that all synchronizer flip-flops have their ASYNC_REG property set to true in order to preserve the synchronizer cells through any logic optimization during synthesis and implementation.		2017-02-24 13:43:32 +02:00
..
Makefile	file renamed; sed output; fingers crossed	2017-02-22 15:56:37 -05:00
system_bd.tcl	file renamed; sed output; fingers crossed	2017-02-22 15:56:37 -05:00
system_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
system_project.tcl	fmcadc5: Integrate ad_sysref_gen into the project	2017-01-03 13:52:39 +02:00
system_top.v	fmcadc5: Integrate ad_sysref_gen into the project	2017-01-03 13:52:39 +02:00