pluto_hdl_adi/projects/common/zc706
Lars-Peter Clausen bfcc3696e4 common: zed/zc702/zc706/mitx045: Set audio clkgen clock source type
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.

For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer.  So set the
configuration accordingly.

Avoids the following warning:
	[Opt 31-32] Removing redundant IBUF since it is not being driven by a
	top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
	Resolution: The tool has removed redundant IBUF. To resolve this
	warning, check for redundant IBUF in the input design.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-20 18:12:24 +02:00
..
zc706_plddr3_adcfifo_bd.tcl zc706- ad-ip-instance & ad-ip-parameter 2017-04-06 13:03:22 -04:00
zc706_plddr3_constr.xdc plddr3- change to board files 2017-02-22 15:22:50 -05:00
zc706_plddr3_dacfifo_bd.tcl zc706- ad-ip-instance & ad-ip-parameter 2017-04-06 13:03:22 -04:00
zc706_plddr3_mig.prj plddr3- change to board files 2017-02-22 15:22:50 -05:00
zc706_system_bd.tcl common: zed/zc702/zc706/mitx045: Set audio clkgen clock source type 2017-04-20 18:12:24 +02:00
zc706_system_constr.xdc Add .gitattributes file 2015-06-26 11:07:10 +02:00