pluto_hdl_adi/projects/fmcomms2_pr/zc706
Lars-Peter Clausen 4ed7c9aee9 fmcomms2_pr: zc706: Fix ddr and fixed_io signal names
The toplevel input/output signal names are lower case, but the signals
connected to the system_wrapper are upper case. Since verilog is case
sensitive this leaves the toplevel input/output signals unconnected. Fix
this by using lower case names everywhere.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
..
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
prcfg_constr.xdc prcfg: Increase the PR portion area in order to increase the DSP resource. 2014-11-18 10:05:49 +02:00
system_bd.tcl fmcomms2_pr ZC706: Update project to the new framework 2015-03-24 13:37:37 +02:00
system_project.tcl fmcomms2_pr ZC706: Update project to the new framework 2015-03-24 13:37:37 +02:00
system_top.v fmcomms2_pr: zc706: Fix ddr and fixed_io signal names 2015-04-23 14:33:47 +02:00