caosjr bad1d03678 spi_engine: Fixup param ranges and CPHA info (#1239) ... Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected min/max values in the verilog source code. Also, fix swapped description for CPHA in the documentation. Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>		2023-12-18 10:52:26 -03:00
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Makefile	library & projects: Update Makefiles	2023-01-27 11:54:05 +02:00
spi_engine_execution.v	SPI Engine: Fixed delay behaviour on Chip-Select and Sleep instructions (#1200)	2023-10-30 09:52:04 -03:00
spi_engine_execution_constr.ttcl	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
spi_engine_execution_hw.tcl	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
spi_engine_execution_ip.tcl	spi_engine: Fixup param ranges and CPHA info (#1239)	2023-12-18 10:52:26 -03:00